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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td763 def : ROSysReg<"RNDR", 0b11, 0b011, 0b0010, 0b0100, 0b000>;
764 def : ROSysReg<"RNDRRS", 0b11, 0b011, 0b0010, 0b0100, 0b001>;
778 def : RWSysReg<"MFAR_EL3", 0b11, 0b110, 0b0110, 0b0000, 0b101>;
779 def : RWSysReg<"GPCCR_EL3", 0b11, 0b110, 0b0010, 0b0001, 0b110>;
780 def : RWSysReg<"GPTBR_EL3", 0b11, 0b110, 0b0010, 0b0001, 0b100>;
1340 0b11, 0b000, 0b0110, 0b1000, 0b000>{
1346 0b11, 0b000, 0b0110, 0b1000, 0b001>{
1356 def : RWSysReg<"PAN", 0b11, 0b000, 0b0100, 0b0010, 0b011>;
1403 def : RWSysReg<"UAO", 0b11, 0b000, 0b0100, 0b0010, 0b100>;
1595 def : RWSysReg<"SSBS", 0b11, 0b011, 0b0100, 0b0010, 0b110>;
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dswp-phi-dep.ll37 br i1 undef, label %b9, label %b11
43 br i1 undef, label %b12, label %b11
45 b11: ; preds = %b11, %b10, %b8
46 %v0 = phi i32 [ %v6, %b11 ], [ undef, %b8 ], [ undef, %b10 ]
47 %v1 = phi i32 [ %v0, %b11 ], [ %a0, %b8 ], [ undef, %b10 ]
55 br i1 %v7, label %b11, label %b12
57 b12: ; preds = %b11, %b10, %b7
H A Dswp-exit-fixup.ll25 br label %b11
38 br i1 %v0, label %b10, label %b11
51 br i1 %v9, label %b11, label %b10
53 b11: ; preds = %b10, %b9, %b5
57 b12: ; preds = %b11
69 b16: ; preds = %b15, %b12, %b11
H A Dstack-align-reset.ll34 … (void (i32, i8*, i32, i8*, ...)* @f0, void (i32, i8*, i32, i8*, ...)* null), label %b11, label %b9
40 b10: ; preds = %b11
44 b11: ; preds = %b11, %b7
45 br i1 undef, label %b10, label %b11
H A Dexpand-condsets-undefvni.ll29 br i1 undef, label %b16, label %b11
31 b11: ; preds = %b10
44 b16: ; preds = %b15, %b14, %b13, %b11, %b10, %b8
45 …%v17 = phi i64 [ undef, %b13 ], [ -2251799813685248, %b14 ], [ 0, %b15 ], [ %v12, %b11 ], [ %v9, %…
H A Dwcsrtomb.ll35 br label %b11
74 b11: ; preds = %b21, %b4
86 b12: ; preds = %b11
94 b13: ; preds = %b12, %b11
95 %v45 = phi i16 [ %v44, %b12 ], [ %v37, %b11 ]
96 %v46 = phi i16 [ %v42, %b12 ], [ %v36, %b11 ]
97 %v47 = phi i32 [ %v40, %b12 ], [ %v35, %b11 ]
98 %v48 = phi i8* [ %v7, %b12 ], [ %v31, %b11 ]
145 br i1 %v66, label %b22, label %b11
H A Dmachine-sink.ll51 br i1 undef, label %b11, label %b13
53 b11: ; preds = %b10
56 b12: ; preds = %b11
59 b13: ; preds = %b11, %b10
H A Dpacketize-impdef-1.ll66 br i1 undef, label %b11, label %b12
68 b11: ; preds = %b10
86 b15: ; preds = %b13, %b11
87 %v15 = phi i32 [ undef, %b13 ], [ %v14, %b11 ]
88 %v16 = phi i32 [ 2, %b13 ], [ 1, %b11 ]
89 %v17 = phi i64 [ undef, %b13 ], [ %v12, %b11 ]
H A Dswp-rename-dead-phi.ll51 br i1 %v13, label %b10, label %b11
54 br label %b11
56 b11: ; preds = %b10, %b9
64 b13: ; preds = %b13, %b11
H A Dswp-phi-def-use.ll80 br label %b11
83 br i1 undef, label %b9, label %b11
100 br i1 %v40, label %b10, label %b11
102 b11: ; preds = %b10, %b8, %b7
106 b12: ; preds = %b11
109 b13: ; preds = %b12, %b11
H A Dbrcond-setne.ll12 br i1 %v2, label %b11, label %b1
28 br label %b11
66 br label %b11
68 b11: ; preds = %b10, %b3, %b0
H A Dinvalid-memrefs.ll36 br i1 undef, label %b11, label %b8
47 b11: ; preds = %b7
50 b12: ; preds = %b11
96 b25: ; preds = %b11
H A Dbug6757-endloop.ll41 br label %b11
89 b11: ; preds = %b12, %b2
94 b12: ; preds = %b13, %b11
96 br i1 %v41, label %b14, label %b11
98 b13: ; preds = %b11
H A Dswp-change-dep.ll37 br i1 undef, label %b11, label %b10
39 b11: ; preds = %b10
42 b12: ; preds = %b12, %b11
H A Dbug14859-iv-cleanup-lpad.ll69 b7: ; preds = %b11, %b2
70 %v27 = phi i32* [ %v21, %b11 ], [ %a1, %b2 ]
99 br i1 %v43, label %b11, label %b12
101 b11: ; preds = %b10
150 b16: ; preds = %b15, %b11, %b9, %b1
151 %v73 = phi i8* [ %v8, %b1 ], [ %v13, %b11 ], [ %v13, %b9 ], [ %v13, %b15 ]
152 %v74 = phi i8 [ 0, %b1 ], [ 0, %b11 ], [ 0, %b9 ], [ %v72, %b15 ]
153 %v75 = phi i32* [ %a1, %b1 ], [ %v21, %b11 ], [ %v29, %b9 ], [ %v21, %b15 ]
H A Dvect_setcc.ll15 b1: ; preds = %b11
55 b10: ; preds = %b11, %b9, %b8
58 b11: ; preds = %b12
84 br i1 %v34, label %b12, label %b11
H A Dtwoaddressbug.ll72 i32 2, label %b11
75 i32 3, label %b11
104 b11: ; preds = %b4, %b4
107 b12: ; preds = %b11
111 b13: ; preds = %b11
H A Dopt-glob-addrs-001.ll97 br i1 %v38, label %b11, label %b13
99 b11: ; preds = %b10
109 b12: ; preds = %b11
160 b19: ; preds = %b18, %b15, %b14, %b13, %b12, %b11, %b7…
161 …73, %b18 ], [ %v6, %b15 ], [ %v6, %b14 ], [ %v6, %b13 ], [ %v6, %b12 ], [ %v6, %b11 ], [ %v6, %b2 ]
162 …75, %b18 ], [ %v5, %b15 ], [ %v5, %b14 ], [ %v5, %b13 ], [ %v5, %b12 ], [ %v5, %b11 ], [ %v5, %b2 ]
163 …4, %b18 ], [ %v4, %b15 ], [ %v4, %b14 ], [ %v4, %b13 ], [ %v44, %b12 ], [ %v4, %b11 ], [ %v4, %b2 ]
164 …v3, %b18 ], [ %v3, %b15 ], [ %v3, %b14 ], [ %v3, %b13 ], [ %v3, %b12 ], [ %v3, %b11 ], [ %v3, %b2 ]
H A Dnewvaluejump-postinc.ll57 br label %b11
78 br label %b11
85 br label %b11
87 b11: ; preds = %b10, %b9, %b7
H A Drdf-copy-undef.ll68 br i1 undef, label %b10, label %b11
72 br label %b11
74 b11: ; preds = %b10, %b9
93 b12: ; preds = %b11
97 b13: ; preds = %b12, %b11
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrVFP.td585 def VCMPED : ADuI<0b11101, 0b11, 0b0100, 0b11, 0,
590 def VCMPES : ASuI<0b11101, 0b11, 0b0100, 0b11, 0,
599 def VCMPEH : AHuI<0b11101, 0b11, 0b0100, 0b11, 0,
628 def VABSD : ADuI<0b11101, 0b11, 0b0000, 0b11, 0,
633 def VABSS : ASuIn<0b11101, 0b11, 0b0000, 0b11, 0,
642 def VABSH : AHuI<0b11101, 0b11, 0b0000, 0b11, 0,
648 def VCMPEZD : ADuI<0b11101, 0b11, 0b0101, 0b11, 0,
656 def VCMPEZS : ASuI<0b11101, 0b11, 0b0101, 0b11, 0,
1019 def H : AHuI<0b11101, 0b11, 0b0110, 0b11, 0,
1028 def S : ASuI<0b11101, 0b11, 0b0110, 0b11, 0,
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dsave-cr-ppc32svr4.ll31 br i1 %v8, label %b9, label %b11
37 b11: ; preds = %b7
42 b14: ; preds = %b11, %b9, %b3
43 %v15 = phi i64 [ %v6, %b3 ], [ %v10, %b9 ], [ %v13, %b11 ]
/llvm-project-15.0.7/llvm/unittests/TableGen/
H A DAutomata.td26 // Token SK_c sets both bits 0b11.
27 def : SimpleTransition<0b11, SK_c>;
66 // Symbols a and b can transition to 0b01 or 0b11 (sets bit 0).
69 // Symbols a and b can also transition to 0b10 or 0b11 (sets bit 1).
137 class Bin01 : BinTransition { let NewState{0,1} = 0b11; }
138 class Bin23 : BinTransition { let NewState{2,3} = 0b11; }
139 class Bin45 : BinTransition { let NewState{4,5} = 0b11; }
/llvm-project-15.0.7/clang/test/Modules/Inputs/PR27513/
H A Dmodule.modulemap5 module "b11.h" { header "b11.h" export *}
/llvm-project-15.0.7/llvm/test/Transforms/SampleProfile/
H A Dprofile-inference-rebalance-large.ll14 ; | | b13 [?] | <-- | b11 [3300] | --> | b14 [?] |
35 b11:
44 ; CHECK: edge b11 -> b12 probability is 0x00000000 / 0x80000000 = 0.00%
45 ; CHECK: edge b11 -> b13 probability is 0x20000000 / 0x80000000 = 25.00%
46 ; CHECK: edge b11 -> b14 probability is 0x20000000 / 0x80000000 = 25.00%
47 ; CHECK: edge b11 -> b15 probability is 0x20000000 / 0x80000000 = 25.00%
48 ; CHECK: edge b11 -> b16 probability is 0x20000000 / 0x80000000 = 25.00%
49 ; CHECK2: - b11: float = {{.*}}, int = {{.*}}, count = 3300

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