Searched refs:arg_2 (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/clang/test/CodeGen/RISCV/ |
| H A D | riscv-v-debuginfo.c | 6 __rvv_int16m2_t f1(__rvv_int16m2_t arg_0, __rvv_int16m2_t arg_1, int64_t arg_2) { in f1() argument
14 __rvv_int16mf2_t f2(__rvv_int16mf2_t arg_0, __rvv_int16mf2_t arg_1, int64_t arg_2) { in f2() argument
22 __rvv_int32mf2_t f3(__rvv_int32mf2_t arg_0, __rvv_int32mf2_t arg_1, int64_t arg_2) { in f3() argument
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/AArch64/ |
| H A D | runtime-unroll-generic.ll | 6 define void @runtime_unroll_generic(i32 %arg_0, i32* %arg_1, i16* %arg_2, i16* %arg_3) {
122 %arg_2.addr = alloca i16*, align 8
127 store i16* %arg_2, i16** %arg_2.addr, align 8
151 %2 = load i16*, i16** %arg_2.addr, align 8
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | wqm-gfx11.ll | 32 define amdgpu_ps <3 x float> @test_direct_load(i32 inreg %arg_0, i32 inreg %arg_1, i32 inreg %arg_2…
52 %c = call float @llvm.amdgcn.lds.direct.load(i32 %arg_2) #1
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| /llvm-project-15.0.7/mlir/test/Transforms/ |
| H A D | loop-fusion-3.mlir | 834 // MAXIMAL-SAME: %[[arg_2:.*]]: memref<1x64xf32, 1>) {
850 // MAXIMAL-NEXT: affine.store %[[reduc_1_sqr]], %[[arg_2]][%[[idx_0]], %[[idx_1]]] : mem…
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| /llvm-project-15.0.7/polly/lib/External/isl/include/isl/ |
| H A D | isl-noexceptions.h | 587 …static inline isl_ast_node *at_each_domain(isl_ast_node *arg_0, isl_ast_build *arg_1, void *arg_2);
6055 isl_ast_node *ast_build::at_each_domain(isl_ast_node *arg_0, isl_ast_build *arg_1, void *arg_2) in at_each_domain() argument
6057 auto *data = static_cast<struct at_each_domain_data *>(arg_2); in at_each_domain()
15331 auto fn_lambda = [](isl_set *arg_0, isl_aff *arg_1, void *arg_2) -> isl_stat { in foreach_piece()
15332 auto *data = static_cast<struct fn_data *>(arg_2); in foreach_piece()
16366 auto fn_lambda = [](isl_set *arg_0, isl_multi_aff *arg_1, void *arg_2) -> isl_stat { in foreach_piece()
16367 auto *data = static_cast<struct fn_data *>(arg_2); in foreach_piece()
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