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Searched refs:arg8 (Results 1 – 25 of 63) sorted by relevance

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/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dfusion-elementwise-options.mlir24 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
31 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
38 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
45 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32, %arg9 : f32):
47 %8 = arith.addf %7, %arg8 : f32
H A Dfusion-2-level.mlir26 scf.for %arg8 = %c0 to %9 step %c2 {
29 …%14 = memref.subview %5[%arg8, %arg10][%c2, %c4][%c1, %c1] : memref<?x?xf32, offset: ?, strides: […
31 …%17 = memref.subview %8[%arg8, %arg9][%c2, %c3][%c1, %c1] : memref<?x?xf32, offset: ?, strides: [?…
H A Dhoisting.mlir202 iter_args(%arg6 = %arg0, %arg7 = %arg1, %arg8 = %arg2,
215 %u2 = "some_use"(%arg8) : (tensor<?x?xf32>) -> vector<3xf32>
221 %w2 = vector.transfer_write %u2, %arg8[%c0, %c0] : vector<3xf32>, tensor<?x?xf32>
366 iter_args(%arg6 = %arg0, %arg7 = %arg1, %arg8 = %arg2)
380 // Does not hoist, 2 slice %arg8.
381 …%st2 = tensor.extract_slice %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
399 // Does not hoist, 2 slice / insert_slice for %arg8.
410 // Does not hoist, 2 slice / insert_slice for %arg8.
411 …%sti2 = tensor.insert_slice %w2 into %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> into ten…
414 …%sti22 = tensor.insert_slice %st22 into %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> into …
H A Dfusion-push-reshape.mlir110 ^bb0(%arg6: i32, %arg7: f32, %arg8: f32, %arg9: f32):
116 %34 = arith.addf %33, %arg8 : f32
H A Dpromote.mlir165 …%arg3: index, %arg4: index, %arg5: index, %arg6: index, %arg7: index, %arg8: index, %ub1: index, %…
166 …%13 = memref.subview %arg0[%arg3, 0, %arg4, %arg8] [1, 1, %ub1, 32] [1, 1, 1, 1] : memref<?x?x?x64…
167 …%14 = memref.subview %arg1[0, %arg6, %arg7, %arg8] [128, 1, 1, 32] [1, 1, 1, 1] : memref<128x3x3x6…
H A Dsplit_reduction.mlir43 ^bb0(%arg7: f32, %arg8: f32, %arg9: f32):
44 %40 = arith.subf %arg7, %arg8 : f32
/llvm-project-15.0.7/flang/test/Semantics/
H A Dresolve72.f9010 subroutine inner1(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8)
24 type(*), dimension(3) :: arg8 local
H A Dresolve82.f9029 subroutine testProcDecl(arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) argument
39 procedure(procFunc), intent(out), pointer, intent(inout) :: arg8 local
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dps-shader-arg-count.ll6 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
16 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
30 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
44 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
63 %i6 = extractelement <2 x float> %arg8, i32 0
109 %i6 = extractelement <2 x float> %arg8, i32 0
155 %i6 = extractelement <2 x float> %arg8, i32 0
197 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
206 …g4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9,…
287 %i6 = extractelement <2 x float> %arg8, i32 0
[all …]
H A Dret.ll45 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
50 %i3 = extractelement <2 x i32> %arg8, i32 0
70 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
84 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
86 %f = bitcast <2 x i32> %arg8 to <2 x float>
103 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
108 %i3 = extractelement <2 x i32> %arg8, i32 0
132 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
137 %i3 = extractelement <2 x i32> %arg8, i32 0
161 …i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, f…
[all …]
H A Dmixed_wave32_wave64.ll45 …, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %arg10) loca…
58 …, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %arg10) loca…
71 …, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %arg10) loca…
84 …, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %arg10) loca…
H A Ddiverge-extra-formal-args.ll14 …, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8) local_unnamed_addr…
16 %tmp = add i32 %arg4, %arg8
H A Damdpal_scratch_mergedshader.ll12 …%arg3, i32 inreg %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 inreg %arg7, <6 x i32> inreg %arg8) {
19 %tmp15 = extractelement <6 x i32> %arg8, i32 3
H A Dcallee-special-input-vgprs-packed.ll332 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
347 store volatile i32 %arg8, i32 addrspace(1)* undef
434 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
439 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
459 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
474 store volatile i32 %arg8, i32 addrspace(1)* undef
587 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
606 store volatile i32 %arg8, i32 addrspace(1)* undef
685 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
704 store volatile i32 %arg8, i32 addrspace(1)* undef
H A Dcallee-special-input-vgprs.ll331 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
346 store volatile i32 %arg8, i32 addrspace(1)* undef
440 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
445 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
467 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
482 store volatile i32 %arg8, i32 addrspace(1)* undef
592 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
611 store volatile i32 %arg8, i32 addrspace(1)* undef
683 i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
702 store volatile i32 %arg8, i32 addrspace(1)* undef
H A Dsmrd.ll138 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
154 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
177 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
198 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
218 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
234 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
250 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
270 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
290 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
306 …i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
[all …]
H A Dunigine-liveness-crash.ll12 …5) %arg4, float inreg %arg5, i32 inreg %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <…
14 %i.i = extractelement <2 x i32> %arg8, i32 0
15 %j.i = extractelement <2 x i32> %arg8, i32 1
H A Dwait.ll17 …8> addrspace(4)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float a…
52 …rspace(4)* inreg %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %ar…
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dirtranslator-stack-evt-bug47619.ll4 ; Make sure the i3 %arg8 value is correctly handled. This was trying
7 …(i64 %arg, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6, i64 %arg7, i3 %arg8) {
26 ret i3 %arg8
H A Dirtranslator-stack-objects.ll14 i64 %arg7, i64 %arg8, i64* byval(i64) %arg9) {
25 %add = add i64 %load, %arg8
/llvm-project-15.0.7/llvm/test/Bindings/llvm-c/
H A Dfreeze.ll8 ptr %arg5, %struct.T %arg6, [2 x i32] %arg7, { i32, i32 } %arg8) {
20 %12 = freeze { i32, i32 } %arg8
/llvm-project-15.0.7/clang/test/CodeGen/PowerPC/
H A Daix-struct-arg.c77 void arg8(Eight x) {} in arg8() function
/llvm-project-15.0.7/mlir/test/Conversion/GPUToVulkan/
H A Dinvoke-vulkan.mlir49 …4, %arg1: i64, %arg2: i64, %arg6: !llvm.ptr<f32>, %arg7: !llvm.ptr<f32>, %arg8: i64, %arg9: i64, %…
53 …%3 = llvm.insertvalue %arg8, %2[2] : !llvm.struct<(ptr<f32>, ptr<f32>, i64, array<1 x i64>, array<…
/llvm-project-15.0.7/llvm/test/Analysis/CFLAliasAnalysis/Steensgaard/
H A Dstratified-attrs-indexing.ll13 i32* %arg6, i32* %arg7, i32* %arg8, i32* %arg9, i32* %arg10,
/llvm-project-15.0.7/mlir/test/Dialect/LLVMIR/
H A Drocdl.mlir42 %arg8 : vector<16xi32>, %arg9 : vector<4xi32>,
103 %r11 = rocdl.mfma.i32.16x16x4i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
113 %r13 = rocdl.mfma.i32.32x32x8i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
189 %r28 = rocdl.mfma.i32.32x32x16.i8 %arg14, %arg14, %arg8, %arg3, %arg3, %arg3 :

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