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/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dfusion-elementwise-options.mlir24 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
25 %1 = arith.mulf %arg6, %arg7 : f32
31 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
32 %3 = arith.mulf %arg6, %arg7 : f32
38 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
39 %5 = arith.mulf %arg6, %arg7 : f32
45 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32, %arg9 : f32):
46 %7 = arith.addf %arg6, %arg7 : f32
H A Dfusion.mlir22 scf.for %arg7 = %c0 to %1 step %c4 {
70 scf.for %arg7 = %c0 to %1 step %c4 {
122 scf.for %arg7 = %c0 to %1 step %c4 {
179 scf.for %arg7 = %c0 to %1 step %c4 {
237 scf.for %arg7 = %c0 to %2 step %c4 {
315 scf.for %arg7 = %c0 to %0 step %c4 {
317 %4 = affine.apply #map1(%arg7)
372 scf.for %arg7 = %c0 to %1 step %c4 {
390 scf.for %arg7 = %c0 to %2 step %c4 {
457 scf.for %arg7 = %c0 to %1 step %c4 {
[all …]
H A Dfusion-2-level.mlir19 scf.for %arg7 = %c0 to %1 step %c40 {
20 …%5 = memref.subview %C[%arg5, %arg7][%c20, %c40][%c1, %c1] : memref<?x?xf32, offset: ?, strides: […
21 …%7 = memref.subview %D[%arg7, %arg6][%c40, %c30][%c1, %c1]: memref<?x?xf32, offset: ?, strides: [?…
H A Dtransform-op-vectorize.mlir57 ^bb0(%arg6: index, %arg7: index):
63 ^bb0(%arg6: index, %arg7: index):
110 ^bb0(%arg6: index, %arg7: index):
116 ^bb0(%arg6: index, %arg7: index):
H A Dhoisting.mlir202 iter_args(%arg6 = %arg0, %arg7 = %arg1, %arg8 = %arg2,
206 %r0 = vector.transfer_read %arg7[%c0, %c0], %cst: tensor<?x?xf32>, vector<1xf32>
219 %w1 = vector.transfer_write %u0, %arg7[%c0, %c0] : vector<1xf32>, tensor<?x?xf32>
293 %arg7 = %arg3)
299 %r30 = vector.transfer_read %arg7[%c0, %random_index], %cst: tensor<?x?xf32>, vector<4xf32>
300 %r31 = vector.transfer_read %arg7[%c1, %random_index], %cst: tensor<?x?xf32>, vector<4xf32>
315 %w30 = vector.transfer_write %u30, %arg7[%c0, %random_index] : vector<4xf32>, tensor<?x?xf32>
366 iter_args(%arg6 = %arg0, %arg7 = %arg1, %arg8 = %arg2)
375 …%st1 = tensor.extract_slice %arg7[%j, %c0][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
407 …%sti1 = tensor.insert_slice %w1 into %arg7[%j, %c0][%step, %step][1, 1] : tensor<?x?xf32> into ten…
/llvm-project-15.0.7/flang/test/Semantics/
H A Dresolve72.f9010 subroutine inner1(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8)
22 type(*), value :: arg7
H A Dresolve82.f9029 subroutine testProcDecl(arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) argument
37 procedure(procFunc), intent(inout), pointer, intent(out) :: arg7 local
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dps-shader-arg-count.ll6 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
16 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
30 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
44 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
62 %i5 = extractelement <2 x float> %arg7, i32 0
108 %i5 = extractelement <2 x float> %arg7, i32 0
154 %i5 = extractelement <2 x float> %arg7, i32 0
197 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
206 …g3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8,…
286 %i5 = extractelement <2 x float> %arg7, i32 0
[all …]
H A Dret_jump.ll24 …eg %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
26 %i.i = extractelement <2 x i32> %arg7, i32 0
27 %j.i = extractelement <2 x i32> %arg7, i32 1
76 …eg %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
78 %i.i = extractelement <2 x i32> %arg7, i32 0
79 %j.i = extractelement <2 x i32> %arg7, i32 1
H A Dret.ll45 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
49 %i2 = extractelement <2 x i32> %arg7, i32 0
70 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
84 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
103 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
107 %i2 = extractelement <2 x i32> %arg7, i32 0
132 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
136 %i2 = extractelement <2 x i32> %arg7, i32 0
161 …i32> %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <3 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
165 %i2 = extractelement <2 x i32> %arg7, i32 0
H A Dmixed_wave32_wave64.ll45 …inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %…
58 …inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %…
71 …inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %…
84 …inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8, float %…
H A Dwait.ll17 …g3, <16 x i8> addrspace(4)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %ar…
52 … x i8>] addrspace(4)* inreg %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 %arg7, i32 %arg8, i32 %ar…
56 %tmp12 = add i32 %arg5, %arg7
65 %tmp20 = add i32 %arg5, %arg7
H A Dsgpr-copy.ll8 …nreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <…
32 …nreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <…
172 …nreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <…
225 …nreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <…
289 …nreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <…
327 …eg %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <…
336 %i.i = extractelement <2 x i32> %arg7, i32 0
337 %j.i = extractelement <2 x i32> %arg7, i32 1
342 %i.i1 = extractelement <2 x i32> %arg7, i32 0
343 %j.i2 = extractelement <2 x i32> %arg7, i32 1
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dinlining.mlir38 ^bb0(%arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<i32>, %arg7: tensor<10xi32>):
39 …%2 = call @while_cond_40(%arg4, %arg5, %arg6, %arg7) : (tensor<i32>, tensor<i32>, tensor<i32>, ten…
42 ^bb0(%arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<i32>, %arg7: tensor<10xi32>):
43 …%2:4 = call @while_body_50(%arg4, %arg5, %arg6, %arg7) : (tensor<i32>, tensor<i32>, tensor<i32>, t…
/llvm-project-15.0.7/llvm/test/Bindings/llvm-c/
H A Dfreeze.ll8 ptr %arg5, %struct.T %arg6, [2 x i32] %arg7, { i32, i32 } %arg8) {
19 %11 = freeze [2 x i32] %arg7
/llvm-project-15.0.7/mlir/test/Dialect/Affine/
H A Dloop-unswitch.mlir187 affine.for %arg7 = #lb0(%arg5) to min #ub0(%arg5)[%sym] {
190 affine.if #set0(%arg6, %arg7)[%sym, %sym] {
192 affine.for %arg10 = #flb1(%arg7) to #fub1(%arg7) {
198 affine.for %arg10 = #lb1(%arg7) to min #pub1(%arg7)[%sym] {
/llvm-project-15.0.7/mlir/test/Dialect/MemRef/
H A Dfold-subview-ops.mlir63 … : index, %arg2 : index, %arg3 : index, %arg4 : index, %arg5 : index, %arg6 : index, %arg7 : f32) {
66 memref.store %arg7, %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [?, ?]>
105 … %arg2 : index, %arg3 : index, %arg4 : index, %arg5: index, %arg6 : index, %arg7 : vector<4xf32>) {
108 …vector.transfer_write %arg7, %0[%arg3, %arg4] {in_bounds = [true]} : vector<4xf32>, memref<4x4xf32…
129 %arg7 : index, %arg8 : index, %arg9 : index, %arg10: index,
132 …%0 = memref.subview %arg0[%arg1, %arg2, %arg3, %arg4, %arg5, %arg6][4, 1, 1, 4, 1, 1][%arg7, %arg8…
198 %arg5: index, %arg6 : index, %arg7 : index) {
203 vector.transfer_write %arg1, %0[%arg6, %arg7] {in_bounds = [true]}
228 %arg5: index, %arg6 : index, %arg7 : index) {
233 vector.transfer_write %arg1, %0[%arg6, %arg7] {in_bounds = [true]}
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dremove-redundant-load-imm.ll12 define void @redundancy_on_ppc_only(i1 %arg7) nounwind {
32 call void @barney.88(i1 %arg7, i32* null)
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Damdgpu-abi-struct-coerce.cl489 …g6, %struct.struct_4regs addrspace(5)* nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
491 short4 arg4, short4 arg5, short4 arg6, struct_4regs arg7) { }
497 …g6, %struct.struct_4regs addrspace(5)* nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
499 short3 arg4, short3 arg5, short3 arg6, struct_4regs arg7) { }
501 …rg4, <2 x i16> noundef %arg5, <2 x i16> noundef %arg6, <2 x i16> noundef %arg7, <2 x i16> noundef …
503 short2 arg4, short2 arg5, short2 arg6, short2 arg7,
507 …rg4, <2 x i16> noundef %arg5, <2 x i16> noundef %arg6, <2 x i16> noundef %arg7, <2 x i16> noundef …
509 short2 arg4, short2 arg5, short2 arg6, short2 arg7,
517 …g6, %struct.struct_4regs addrspace(5)* nocapture noundef byval(%struct.struct_4regs) align 4 %arg7)
519 char2 arg4, char2 arg5, int arg6, struct_4regs arg7) { }
/llvm-project-15.0.7/polly/test/ScheduleOptimizer/
H A Dpattern-matching-based-opts_2.ll22 …e %arg3, double %arg4, [1056 x double]* %arg5, [1024 x double]* %arg6, [1056 x double]* %arg7) #0 {
43 %tmp19 = getelementptr inbounds [1056 x double], [1056 x double]* %arg7, i64 %tmp15, i64 %tmp10
H A Dmat_mul_pattern_data_layout.ll24 …e %arg3, double %arg4, [1056 x double]* %arg5, [1024 x double]* %arg6, [1056 x double]* %arg7) #0 {
45 %tmp19 = getelementptr inbounds [1056 x double], [1056 x double]* %arg7, i64 %tmp15, i64 %tmp10
H A Dpattern-matching-based-opts.ll24 …e %arg3, double %arg4, [1056 x double]* %arg5, [1024 x double]* %arg6, [1056 x double]* %arg7) #0 {
45 %tmp19 = getelementptr inbounds [1056 x double], [1056 x double]* %arg7, i64 %tmp15, i64 %tmp10
/llvm-project-15.0.7/clang/test/CodeGen/PowerPC/
H A Daix-struct-arg.c71 void arg7(Seven x) {} in arg7() function
/llvm-project-15.0.7/mlir/test/Analysis/
H A Dtest-topoligical-sort.mlir15 scf.for %arg7 = %idx to %arg2 step %arg3 {
/llvm-project-15.0.7/mlir/test/Conversion/OpenMPToLLVM/
H A Dconvert-to-llvmir.mlir76 ^bb0(%arg6: index, %arg7: index):
80 "test.payload"(%arg6, %arg7) : (index, index) -> ()

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