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/llvm-project-15.0.7/mlir/test/Analysis/
H A Dtest-liveness.mlir324 // CHECK-NEXT: arg5@0 arg6@0 val_7 val_8
330 scf.for %arg6 = %arg0 to %arg1 step %arg2 {
332 // CHECK-NEXT: LiveIn: arg5@0 arg6@0 val_7
340 // CHECK-SAME: arg6@0 val_11
389 scf.for %arg6 = %arg0 to %arg1 step %arg2 {
413 // CHECK-SAME: arg6@0 val_12
456 scf.for %arg6 = %arg0 to %arg1 step %arg2 {
458 // CHECK-NEXT: LiveIn: arg5@0 arg6@0 val_7
464 // CHECK-SAME: arg6@0 val_10
483 // CHECK-NEXT: LiveIn: arg6@0 val_7 val_8
[all …]
H A Dtest-topoligical-sort.mlir11 %arg4 : i32, %arg5 : i32, %arg6 : i32,
17 %3 = arith.subi %2, %arg6 {__test_sort_original_idx__ = 1} : i32
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dfusion-elementwise-options.mlir24 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
25 %1 = arith.mulf %arg6, %arg7 : f32
31 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
32 %3 = arith.mulf %arg6, %arg7 : f32
38 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32):
39 %5 = arith.mulf %arg6, %arg7 : f32
45 ^bb0(%arg6 : f32, %arg7 : f32, %arg8 : f32, %arg9 : f32):
46 %7 = arith.addf %arg6, %arg7 : f32
H A Dfusion.mlir21 scf.for %arg6 = %c0 to %2 step %c3 {
69 scf.for %arg6 = %c0 to %2 step %c3 {
121 scf.for %arg6 = %c0 to %2 step %c3 {
178 scf.for %arg6 = %c0 to %2 step %c3 {
236 scf.for %arg6 = %c0 to %0 step %c3 {
314 scf.for %arg6 = %c0 to %2 step %c3 {
321 %6 = affine.apply #map2(%arg6)
371 scf.for %arg6 = %c0 to %2 step %c3 {
389 scf.for %arg6 = %c0 to %4 step %c3 {
456 scf.for %arg6 = %c0 to %2 step %c3 {
[all …]
H A Dpromote.mlir23 scf.for %arg6 = %c0 to %7 step %c4 {
24 …%11 = memref.subview %3[%arg4, %arg6][%c2, %c4][1, 1] : memref<?x?xf32> to memref<?x?xf32, offset:…
25 …%14 = memref.subview %4[%arg6, %arg5][%c4, %c3][1, 1] : memref<?x?xf32> to memref<?x?xf32, offset:…
96 scf.for %arg6 = %c0 to %7 step %c4 {
97 …%11 = memref.subview %3[%arg4, %arg6][%c2, %c4][1, 1] : memref<?x?xf64> to memref<?x?xf64, offset:…
98 …%14 = memref.subview %4[%arg6, %arg5][%c4, %c3][1, 1] : memref<?x?xf64> to memref<?x?xf64, offset:…
165 …%arg3: index, %arg4: index, %arg5: index, %arg6: index, %arg7: index, %arg8: index, %ub1: index, %…
167 …%14 = memref.subview %arg1[0, %arg6, %arg7, %arg8] [128, 1, 1, 32] [1, 1, 1, 1] : memref<128x3x3x6…
H A Dpad_fusion.mlir14 ^bb0(%arg6 : f32, %arg7 : f32):
15 %1 = arith.mulf %arg6, %arg6 : f32
19 ^bb0(%arg6: index, %arg7 : index):
H A Dfusion-2-level.mlir18 scf.for %arg6 = %c0 to %2 step %c30 {
21 …%7 = memref.subview %D[%arg7, %arg6][%c40, %c30][%c1, %c1]: memref<?x?xf32, offset: ?, strides: [?…
22 …%8 = memref.subview %E[%arg5, %arg6][%c20, %c40][%c1, %c1] : memref<?x?xf32, offset: ?, strides: […
/llvm-project-15.0.7/flang/test/Lower/OpenMP/
H A Domp-parallel-firstprivate-clause-scalar.f9060 integer(kind=16) :: arg6 local
63 call bar(arg1, arg2, arg3, arg4, arg5, arg6)
134 real(kind=16) :: arg6 local
137 call qux(arg1, arg2, arg3, arg4, arg5, arg6)
/llvm-project-15.0.7/llvm/test/Analysis/LegacyDivergenceAnalysis/AMDGPU/
H A Dkernel-args.ll9 ; CHECK: DIVERGENT: i32 %arg6
11 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
22 ; CHECK-NOT: %arg6
23 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
35 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
/llvm-project-15.0.7/llvm/test/Analysis/DivergenceAnalysis/AMDGPU/
H A Dkernel-args.ll9 ; CHECK: DIVERGENT: i32 %arg6
11 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
22 ; CHECK-NOT: %arg6
23 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
35 … float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Damdgpu-abi-struct-coerce.cl485 … noundef %arg4, <4 x i16> noundef %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, …
487 short4 arg4, short4 arg5, struct_4regs arg6) { }
491 short4 arg4, short4 arg5, short4 arg6, struct_4regs arg7) { }
493 … noundef %arg4, <3 x i16> noundef %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, …
495 short3 arg4, short3 arg5, struct_4regs arg6) { }
499 short3 arg4, short3 arg5, short3 arg6, struct_4regs arg7) { }
503 short2 arg4, short2 arg5, short2 arg6, short2 arg7,
509 short2 arg4, short2 arg5, short2 arg6, short2 arg7,
513 …> noundef %arg4, <2 x i8> noundef %arg5, i32 %arg6.coerce0, i32 %arg6.coerce1, i32 %arg6.coerce2, …
515 char2 arg4, char2 arg5, struct_4regs arg6) { }
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/MemRef/
H A Dfold-subview-ops.mlir23 %0 = memref.subview %arg0[%arg1, %arg2][4, 4][%arg5, %arg6] :
64 %0 = memref.subview %arg0[%arg1, %arg2][4, 4][%arg5, %arg6] :
86 …%0 = memref.subview %arg0[%arg1, %arg2][4, 4][%arg5, %arg6] : memref<12x32xf32> to memref<4x4xf32,…
106 %0 = memref.subview %arg0[%arg1, %arg2][4, 4][%arg5, %arg6] :
128 %arg3 : index, %arg4 : index, %arg5 : index, %arg6 : index,
169 %arg6 : index) -> vector<4xf32> {
174 %1 = vector.transfer_read %0[%arg5, %arg6], %cst {in_bounds = [true]}
198 %arg5: index, %arg6 : index, %arg7 : index) {
203 vector.transfer_write %arg1, %0[%arg6, %arg7] {in_bounds = [true]}
228 %arg5: index, %arg6 : index, %arg7 : index) {
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Affine/
H A DPasses.td114 affine.for %arg6 = 0 to 3 {
115 %0 = affine.load %arg0[%arg5, %arg6] : memref<10x10xf32>
116 %1 = affine.load %arg1[%arg5, %arg6] : memref<10x10xf32>
118 affine.store %2, %arg3[%arg5, %arg6] : memref<10x10xf32>
122 affine.for %arg6 = 0 to 3 {
123 %0 = affine.load %arg0[%arg5, %arg6] : memref<10x10xf32>
124 %1 = affine.load %arg2[%arg5, %arg6] : memref<10x10xf32>
126 affine.store %2, %arg4[%arg5, %arg6] : memref<10x10xf32>
138 affine.for %arg6 = 0 to 3 {
139 %0 = affine.load %arg0[%arg5, %arg6] : memref<10x10xf32>
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dsi-sgpr-spill.ll110 %i.i = extractelement <2 x i32> %arg6, i32 0
111 %j.i = extractelement <2 x i32> %arg6, i32 1
116 %i.i91 = extractelement <2 x i32> %arg6, i32 0
117 %j.i92 = extractelement <2 x i32> %arg6, i32 1
122 %i.i85 = extractelement <2 x i32> %arg6, i32 0
123 %j.i86 = extractelement <2 x i32> %arg6, i32 1
128 %i.i79 = extractelement <2 x i32> %arg6, i32 0
200 %i.i7 = extractelement <2 x i32> %arg6, i32 0
201 %j.i8 = extractelement <2 x i32> %arg6, i32 1
206 %i.i1 = extractelement <2 x i32> %arg6, i32 0
[all …]
H A Dps-shader-arg-count.ll6 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
16 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
30 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
44 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
61 %i4 = extractelement <3 x float> %arg6, i32 1
107 %i4 = extractelement <3 x float> %arg6, i32 1
153 %i4 = extractelement <3 x float> %arg6, i32 1
197 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
206 …g2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7,…
285 %i4 = extractelement <3 x float> %arg6, i32 1
[all …]
/llvm-project-15.0.7/flang/test/Semantics/
H A Dresolve72.f9010 subroutine inner1(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8)
20 type(*), pointer :: arg6 local
H A Dresolve81.f9048 subroutine testTypeDecl(arg1, arg2, arg3, arg4, arg5, arg6) argument
60 integer, intent(in), pointer, intent(inout) :: arg6 local
H A Dresolve82.f9029 subroutine testProcDecl(arg4, arg5, arg6, arg7, arg8, arg9, arg10, arg11) argument
35 procedure(procFunc), intent(inout), pointer, intent(inout) :: arg6 local
/llvm-project-15.0.7/llvm/test/tools/llvm-reduce/
H A Dremove-attributes-from-intrinsic-like-functions.ll30 ; CHECK-INTERESTINGNESS-SAME: "arg6"
35 ; CHECK-FINAL: attributes #0 = { "arg6" }
40 attributes #0 = { "arg6" "arg7" }
/llvm-project-15.0.7/mlir/test/Target/LLVMIR/
H A Drocdl.mlir56 %arg6 : vector<4xf16>, %arg7 : vector<32 x i32>,
88 %r5 = rocdl.mfma.f32.32x32x4f16 %arg6, %arg6, %arg2, %csti32, %csti32, %csti32 :
93 %r6 = rocdl.mfma.f32.16x16x4f16 %arg6, %arg6, %arg4, %csti32, %csti32, %csti32 :
98 %r7 = rocdl.mfma.f32.4x4x4f16 %arg6, %arg6, %arg5, %csti32, %csti32, %csti32 :
103 %r8 = rocdl.mfma.f32.32x32x8f16 %arg6, %arg6, %arg4, %csti32, %csti32, %csti32 :
108 %r9 = rocdl.mfma.f32.16x16x16f16 %arg6, %arg6, %arg5, %csti32, %csti32, %csti32 :
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dinlining.mlir38 ^bb0(%arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<i32>, %arg7: tensor<10xi32>):
39 …%2 = call @while_cond_40(%arg4, %arg5, %arg6, %arg7) : (tensor<i32>, tensor<i32>, tensor<i32>, ten…
42 ^bb0(%arg4: tensor<i32>, %arg5: tensor<i32>, %arg6: tensor<i32>, %arg7: tensor<10xi32>):
43 …%2:4 = call @while_body_50(%arg4, %arg5, %arg6, %arg7) : (tensor<i32>, tensor<i32>, tensor<i32>, t…
/llvm-project-15.0.7/mlir/test/Dialect/LLVMIR/
H A Drocdl.mlir41 %arg6 : vector<4xf16>, %arg7 : vector<32xi32>,
73 %r5 = rocdl.mfma.f32.32x32x4f16 %arg6, %arg6, %arg2, %arg3, %arg3, %arg3 :
78 %r6 = rocdl.mfma.f32.16x16x4f16 %arg6, %arg6, %arg4, %arg3, %arg3, %arg3 :
83 %r7 = rocdl.mfma.f32.4x4x4f16 %arg6, %arg6, %arg5, %arg3, %arg3, %arg3 :
88 %r8 = rocdl.mfma.f32.32x32x8f16 %arg6, %arg6, %arg4, %arg3, %arg3, %arg3 :
93 %r9 = rocdl.mfma.f32.16x16x16f16 %arg6, %arg6, %arg5, %arg3, %arg3, %arg3 :
/llvm-project-15.0.7/llvm/test/Bindings/llvm-c/
H A Dfreeze.ll8 ptr %arg5, %struct.T %arg6, [2 x i32] %arg7, { i32, i32 } %arg8) {
18 %10 = freeze %struct.T %arg6
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dmismatching-array-dimensions.ll9 define void @hoge([38 x [64 x float]]* %arg, [32 x [2 x float]]* %arg5, i32 %arg6) #0 {
15 %tmp9 = icmp sgt i32 %arg6, 0
30 %tmp20 = icmp ne i32 %tmp19, %arg6
/llvm-project-15.0.7/mlir/test/Dialect/Affine/
H A Dloop-unswitch.mlir186 %arg4 : index, %arg5 : index, %arg6 : index, %sym : index) {
190 affine.if #set0(%arg6, %arg7)[%sym, %sym] {
191 affine.for %arg9 = #flb0(%arg6) to #fub0(%arg6) {
197 affine.for %arg9 = #lb0(%arg6) to min #pub0(%arg6)[%sym] {

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