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/llvm-project-15.0.7/mlir/test/Dialect/LLVMIR/
H A Drocdl.mlir48 %r0 = rocdl.mfma.f32.32x32x1f32 %arg0, %arg1, %arg2, %arg3, %arg3, %arg3 :
53 %r1 = rocdl.mfma.f32.16x16x1f32 %arg0, %arg1, %arg4, %arg3, %arg3, %arg3 :
58 %r2 = rocdl.mfma.f32.4x4x1f32 %arg0, %arg1, %arg5, %arg3, %arg3, %arg3 :
63 %r3= rocdl.mfma.f32.32x32x2f32 %arg0, %arg1, %arg4, %arg3, %arg3, %arg3 :
68 %r4 = rocdl.mfma.f32.16x16x4f32 %arg0, %arg1, %arg5, %arg3, %arg3, %arg3 :
83 %r7 = rocdl.mfma.f32.4x4x4f16 %arg6, %arg6, %arg5, %arg3, %arg3, %arg3 :
98 %r10 = rocdl.mfma.i32.32x32x4i8 %arg3, %arg3, %arg7, %arg3, %arg3, %arg3 :
103 %r11 = rocdl.mfma.i32.16x16x4i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
108 %r12 = rocdl.mfma.i32.4x4x4i8 %arg3, %arg3, %arg9, %arg3, %arg3, %arg3 :
113 %r13 = rocdl.mfma.i32.32x32x8i8 %arg3, %arg3, %arg8, %arg3, %arg3, %arg3 :
[all …]
/llvm-project-15.0.7/flang/test/Lower/OpenMP/
H A Domp-parallel-firstprivate-clause-scalar.f9057 integer(kind=2) :: arg3 local
63 call bar(arg1, arg2, arg3, arg4, arg5, arg6)
93 logical(kind=2) :: arg3 local
98 call baz(arg1, arg2, arg3, arg4, arg5)
131 real(kind=4) :: arg3 local
137 call qux(arg1, arg2, arg3, arg4, arg5, arg6)
/llvm-project-15.0.7/clang/test/CodeGenObjC/
H A Dmessages-2.m19 …ThisInt: (int) arg0 andThatFloat: (float) arg1 andADouble: (double) arg2 andAPoint: (MyPoint) arg3;
26 …ThisInt: (int) arg0 andThatFloat: (float) arg1 andADouble: (double) arg2 andAPoint: (MyPoint) arg3;
37 …hisInt: (int) arg0 andThatFloat: (float) arg1 andADouble: (double) arg2 andAPoint: (MyPoint) arg3 {
39 arg0, arg1, arg2, arg3.x, arg3.y);
62 arg0, arg1, arg2, arg3.x, arg3.y);
86 arg3.x *= 2;
87 arg3.y *= 2;
88 [ super printThisInt: arg0*2 andThatFloat: arg1*2 andADouble: arg2*2 andAPoint: arg3 ];
115 arg3.x *= 2;
116 arg3.y *= 2;
[all …]
/llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_win_dll_thunk.h116 extern "C" void name(void *arg1, void *arg2, void *arg3) { \
119 fn(arg1, arg2, arg3); \
148 extern "C" void *name(void *arg1, void *arg2, void *arg3) { \
151 return fn(arg1, arg2, arg3); \
156 extern "C" void *name(void *arg1, void *arg2, void *arg3, void *arg4) { \
159 return fn(arg1, arg2, arg3, arg4); \
164 extern "C" void *name(void *arg1, void *arg2, void *arg3, void *arg4, \
168 return fn(arg1, arg2, arg3, arg4, arg5); \
173 extern "C" void *name(void *arg1, void *arg2, void *arg3, void *arg4, \
177 return fn(arg1, arg2, arg3, arg4, arg5, arg6); \
H A Dsanitizer_syscall_linux_x86_64.inc39 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3) {
42 "S"((u64)arg2), "d"((u64)arg3) : "rcx", "r11", "memory", "cc");
47 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4) {
51 "S"((u64)arg2), "d"((u64)arg3), "r"((u64)arg4) :
57 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4,
63 "S"((u64)arg2), "d"((u64)arg3), "r"((u64)arg4), "r"((u64)arg5) :
70 static uptr internal_syscall(u64 nr, T1 arg1, T2 arg2, T3 arg3, T4 arg4,
77 "S"((u64)arg2), "d"((u64)arg3), "r"((u64)arg4), "r"((u64)arg5),
/llvm-project-15.0.7/mlir/test/Conversion/SCFToOpenMP/
H A Dscf-to-openmp.mlir5 %arg3: index, %arg4: index, %arg5: index) {
7 …// CHECK: omp.wsloop for (%[[LVAR1:.*]], %[[LVAR2:.*]]) : index = (%arg0, %arg1) to (%arg2, %arg3)…
9 scf.parallel (%i, %j) = (%arg0, %arg1) to (%arg2, %arg3) step (%arg4, %arg5) {
22 %arg3: index, %arg4: index, %arg5: index) {
28 // CHECK: omp.wsloop for (%[[LVAR_IN1:.*]]) : index = (%arg1) to (%arg3) step (%arg5) {
30 scf.parallel (%j) = (%arg1) to (%arg3) step (%arg5) {
45 %arg3: index, %arg4: index, %arg5: index) {
59 // CHECK: omp.wsloop for (%[[LVAR_AL2:.*]]) : index = (%arg1) to (%arg3) step (%arg5) {
61 scf.parallel (%j) = (%arg1) to (%arg3) step (%arg5) {
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dret.ll10 …@vgpr([9 x <16 x i8>] addrspace(4)* inreg %arg, i32 inreg %arg1, i32 inreg %arg2, float %arg3) #0 {
12 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %arg3, float %arg3, float %arg3, float %arg3, …
13 %x = fadd float %arg3, 1.000000e+00
15 %b = insertvalue { float, float } %a, float %arg3, 1
28 …teral([9 x <16 x i8>] addrspace(4)* inreg %arg, i32 inreg %arg1, i32 inreg %arg2, float %arg3) #0 {
30 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %arg3, float %arg3, float %arg3, float %arg3, …
183 …@sgpr([9 x <16 x i8>] addrspace(4)* inreg %arg, i32 inreg %arg1, i32 inreg %arg2, float %arg3) #0 {
216 …call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float %arg3, float %arg3, float %arg3, float %arg3, …
217 %v = fadd float %arg3, 1.000000e+00
221 %a2 = insertvalue { float, i32, float, i32, i32 } %a1, float %arg3, 2
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dint-cmp-56.ll7 define i32 @fun0(i32 %arg, i32 %arg2, i32 %arg3) {
18 %tmp4 = add nsw i32 %arg, %arg3
33 define i32 @fun1(i32 %arg, i32 %arg2, i32 %arg3) {
45 %tmp4 = add i32 %arg, %arg3
60 define i32 @fun2(i32 %arg, i32 %arg2, i32 %arg3) {
72 %tmp4 = add nuw i32 %arg, %arg3
88 define i32 @fun3(i32 %arg, i32 %arg2, i32 %arg3) {
99 %tmp4 = sub nsw i32 %arg, %arg3
114 define i32 @fun4(i32 %arg, i32 %arg2, i32 %arg3) {
125 %tmp4 = sub i32 %arg, %arg3
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Ddetensorize_0d.mlir10 ^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
11 %2 = arith.addf %arg3, %arg4 : f32
29 ^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
30 %2 = arith.addf %arg3, %arg4 : f32
38 ^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
39 %5 = arith.mulf %arg3, %arg4 : f32
47 ^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
48 %5 = arith.divf %arg3, %arg4 : f32
69 ^bb0(%arg3: f32, %arg4: f32, %arg5: f32):
70 %2 = arith.addf %arg3, %arg4 : f32
[all …]
/llvm-project-15.0.7/mlir/include/mlir/Dialect/MemRef/Transforms/
H A DPasses.td65 affine.for %arg3 = 0 to 16 {
66 %a = affine.load %A[%arg3] : memref<16xf64, #tile>
68 affine.store %p, %A[%arg3] : memref<16xf64, #tile>
81 affine.for %arg3 = 0 to 16 {
82 %3 = affine.load %arg0[%arg3 floordiv 4, %arg3 mod 4]: memref<4x4xf64>
84 affine.store %4, %arg0[%arg3 floordiv 4, %arg3 mod 4]: memref<4x4xf64>
103 affine.for %arg3 = %c0 to %c8 {
127 affine.for %arg3 = %c0 to %c8 {
130 %0 = affine.load %arg0[%arg3 * 8 + %arg5] : memref<64xi32>
132 %2 = affine.load %arg2[%arg3 * 8 + %arg4] : memref<64xi32>
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/SPIRVToLLVM/
H A Dshift-ops-to-llvm.mlir8 spv.func @shift_right_arithmetic_scalar(%arg0: i32, %arg1: si32, %arg2 : i16, %arg3 : ui16) "None" {
21 %3 = spv.ShiftRightArithmetic %arg0, %arg3 : i32, ui16
26 …ector(%arg0: vector<4xi64>, %arg1: vector<4xui64>, %arg2: vector<4xi32>, %arg3: vector<4xui32>) "N…
39 %3 = spv.ShiftRightArithmetic %arg0, %arg3 : vector<4xi64>, vector<4xui32>
48 spv.func @shift_right_logical_scalar(%arg0: i32, %arg1: si32, %arg2 : si16, %arg3 : ui16) "None" {
61 %3 = spv.ShiftRightLogical %arg0, %arg3 : i32, ui16
66 …ector(%arg0: vector<4xi64>, %arg1: vector<4xsi64>, %arg2: vector<4xi32>, %arg3: vector<4xui32>) "N…
79 %3 = spv.ShiftRightLogical %arg0, %arg3 : vector<4xi64>, vector<4xui32>
88 spv.func @shift_left_logical_scalar(%arg0: i32, %arg1: si32, %arg2 : i16, %arg3 : ui16) "None" {
101 %3 = spv.ShiftLeftLogical %arg0, %arg3 : i32, ui16
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dinlining.mlir12 ^bb0(%arg3: tensor<f32>, %arg4: tensor<f32>):
13 %1 = call @add(%arg3, %arg4) : (tensor<f32>, tensor<f32>) -> tensor<f32>
16 ^bb0(%arg3: tensor<f32>, %arg4: tensor<f32>):
17 %1 = call @sub(%arg3, %arg4) : (tensor<f32>, tensor<f32>) -> tensor<f32>
34 func.func @inlined_while_fn(%arg0: tensor<i32>, %arg1: tensor<i32>, %arg2: tensor<i32>, %arg3: tens…
37 %1:4 = "tosa.while_loop"(%arg0, %arg1, %arg2, %arg3) ({
48 func.func private @while_body_50(%arg0: tensor<i32>, %arg1: tensor<i32>, %arg2: tensor<i32>, %arg3:…
50 %2 = "tosa.add"(%arg3, %1) : (tensor<10xi32>, tensor<i32>) -> tensor<10xi32>
53 func.func private @while_cond_40(%arg0: tensor<i32>, %arg1: tensor<i32>, %arg2: tensor<i32>, %arg3:…
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ParallelDSP/
H A Daliasing.ll15 %.pre = load i16, i16* %arg3, align 2
33 %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
63 %.pre = load i16, i16* %arg3, align 2
115 %.pre = load i16, i16* %arg3, align 2
160 %.pre = load i16, i16* %arg3, align 2
210 %.pre = load i16, i16* %arg3, align 2
257 %.pre = load i16, i16* %arg3, align 2
298 %.pre = load i16, i16* %arg3, align 2
339 %.pre = load i16, i16* %arg3, align 2
380 %.pre = load i16, i16* %arg3, align 2
[all …]
H A Dsmlald2.ll27 %.pre = load i16, i16* %arg3, align 2
40 %arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
43 %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
95 %arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.056
98 %arrayidx2 = getelementptr inbounds i16, i16* %arg3, i32 %add1
101 %arrayidx4 = getelementptr inbounds i16, i16* %arg3, i32 %add3
105 %arrayidx6 = getelementptr inbounds i16, i16* %arg3, i32 %add5
149 %.pre = load i16, i16* %arg3, align 2
163 %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
192 %.pre = load i16, i16* %arg3, align 2
[all …]
H A Dsmlad0.ll28 %.pre = load i16, i16* %arg3, align 2
41 %arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
44 %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
94 %arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.056
97 %arrayidx2 = getelementptr inbounds i16, i16* %arg3, i32 %add1
100 %arrayidx4 = getelementptr inbounds i16, i16* %arg3, i32 %add3
104 %arrayidx6 = getelementptr inbounds i16, i16* %arg3, i32 %add5
143 %.pre = load i16, i16* %arg3, align 2
157 %arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
183 %.pre = load i16, i16* %arg3, align 2
[all …]
/llvm-project-15.0.7/llvm/test/Verifier/SystemZ/
H A Dintrinsic-immarg.ll70 ; CHECK-NEXT: i32 %arg3
79 ; CHECK-NEXT: i32 %arg3
88 ; CHECK-NEXT: i32 %arg3
97 ; CHECK-NEXT: i32 %arg3
106 ; CHECK-NEXT: i32 %arg3
115 ; CHECK-NEXT: i32 %arg3
124 ; CHECK-NEXT: i32 %arg3
133 ; CHECK-NEXT: i32 %arg3
142 ; CHECK-NEXT: i32 %arg3
151 ; CHECK-NEXT: i32 %arg3
[all …]
/llvm-project-15.0.7/mlir/test/Integration/Dialect/Linalg/CPU/
H A Dtest-one-shot-bufferize.mlir20 %3 = scf.for %arg3 = %c0 to %c64 step %c2 iter_args(%arg4 = %2) -> (tensor<?x2xf32>) {
21 %8 = affine.apply #map1(%arg3, %c0)[%c2]
22 %9 = tensor.extract_slice %arg1[%arg3] [2] [1] : tensor<64xf32> to tensor<2xf32>
37 %6 = scf.for %arg3 = %c0 to %c64 step %c2 iter_args(%arg4 = %5) -> (tensor<?x2xf32>) {
38 %8 = affine.apply #map1(%arg3, %c0)[%c2]
39 %9 = tensor.extract_slice %arg0[%arg3] [2] [1] : tensor<64xf32> to tensor<2xf32>
55 %7 = scf.for %arg3 = %c0 to %c64 step %c2 iter_args(%arg4 = %0) -> (tensor<f32>) {
56 %8 = tensor.extract_slice %arg0[%arg3] [2] [1] : tensor<64xf32> to tensor<2xf32>
58 %10 = tensor.extract_slice %arg1[%arg3] [2] [1] : tensor<64xf32> to tensor<2xf32>
60 %12 = affine.apply #map1(%arg3, %c0)[%c2]
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/Affine/
H A Dloop-permute.mlir27 // CHECK-120-NEXT: "bar"(%arg3)
34 // CHECK-102: "foo"(%arg4, %arg3)
37 // CHECK-012: "foo"(%arg3, %arg4)
40 // CHECK-021: "foo"(%arg3, %arg5)
44 // CHECK-210-NEXT: "bar"(%arg3)
46 // CHECK-201: "foo"(%arg5, %arg3)
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Damdgpu-abi-struct-coerce.cl450 void func_reg_state_lo(int4 arg0, int4 arg1, int4 arg2, int arg3, struct_arg_t s) { }
453 void func_reg_state_hi(int4 arg0, int4 arg1, int4 arg2, int arg3, int arg4, struct_arg_t s) { }
477 void v3i32_reg_count(int3 arg1, int3 arg2, int3 arg3, int3 arg4, struct_arg_t arg5) { }
486 void v4i16_reg_count(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
490 void v4i16_pair_reg_count_over(short4 arg0, short4 arg1, short4 arg2, short4 arg3,
494 void v3i16_reg_count(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
498 void v3i16_reg_count_over(short3 arg0, short3 arg1, short3 arg2, short3 arg3,
502 void v2i16_reg_count(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
508 void v2i16_reg_count_over(short2 arg0, short2 arg1, short2 arg2, short2 arg3,
514 void v2i8_reg_count(char2 arg0, char2 arg1, char2 arg2, char2 arg3,
[all …]
/llvm-project-15.0.7/mlir/test/Conversion/ArithmeticToLLVM/
H A Darith-to-llvm.mlir42 %1 = arith.subi %arg2, %arg3: i32
46 %3 = arith.divsi %arg2, %arg3 : i32
48 %4 = arith.divui %arg2, %arg3 : i32
50 %5 = arith.remsi %arg2, %arg3 : i32
52 %6 = arith.remui %arg2, %arg3 : i32
58 %10 = arith.andi %arg2, %arg3 : i32
59 // CHECK: = llvm.or %arg2, %arg3 : i32
60 %11 = arith.ori %arg2, %arg3 : i32
62 %12 = arith.xori %arg2, %arg3 : i32
66 %16 = arith.shli %arg2, %arg3 : i32
[all …]
/llvm-project-15.0.7/mlir/test/Transforms/
H A Dcontrol-flow-sink.mlir31 ^bb0(%arg3: i32):
34 ^bb0(%arg3: i32):
38 ^bb0(%arg3: i32):
74 ^bb0(%arg3: i32):
77 ^bb0(%arg3: i32):
80 ^bb0(%arg3: i32):
84 ^bb0(%arg3: i32):
87 ^bb0(%arg3: i32):
90 ^bb0(%arg3: i32):
125 ^bb0(%arg3: i32):
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/PowerPC/
H A Dvector_unit.ll4 define void @testi16(i16 %arg1, i16 %arg2, i16* %arg3) {
8 %s3 = load i16, i16* %arg3
9 store i16 %arg2, i16* %arg3
43 define void @test4xi32(<4 x i32> %arg1, <4 x i32> %arg2, <4 x i32>* %arg3) {
45 %v1 = load <4 x i32>, <4 x i32>* %arg3
46 store <4 x i32> %arg2, <4 x i32>* %arg3
/llvm-project-15.0.7/libc/src/__support/OSUtil/linux/aarch64/
H A Dsyscall.h23 register long x2 __asm__("x2") = arg3;
67 long arg2, long arg3) { in syscall() argument
74 syscall(long number, long arg1, long arg2, long arg3, long arg4) { in syscall() argument
81 syscall(long number, long arg1, long arg2, long arg3, long arg4, long arg5) { in syscall() argument
88 long arg2, long arg3, in syscall() argument
/llvm-project-15.0.7/mlir/test/Conversion/SCFToSPIRV/
H A Dif.mlir9 func.func @kernel_simple_selection(%arg2 : memref<10xf32>, %arg3 : i1) {
22 scf.if %arg3 {
29 func.func @kernel_nested_selection(%arg3 : memref<10xf32>, %arg4 : memref<10xf32>, %arg5 : i1, %arg…
64 %value = memref.load %arg3[%i] : memref<10xf32>
68 memref.store %value, %arg3[%i] : memref<10xf32>
72 %value = memref.load %arg3[%j] : memref<10xf32>
76 memref.store %value, %arg3[%j] : memref<10xf32>
83 func.func @simple_if_yield(%arg2 : memref<10xf32>, %arg3 : i1) {
108 %0:2 = scf.if %arg3 -> (f32, f32) {
127 func.func @simple_if_yield_type_change(%arg2 : memref<10xf32>, %arg3 : memref<10xf32>, %arg4 : i1) {
[all …]
/llvm-project-15.0.7/mlir/test/Dialect/MemRef/
H A Dfold-subview-ops.mlir5 %1 = memref.load %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [64, 3]>
25 %1 = memref.load %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [?, ?]>
46 memref.store %arg5, %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [64, 3]>
66 memref.store %arg7, %0[%arg3, %arg4] : memref<4x4xf32, offset:?, strides: [?, ?]>
128 %arg3 : index, %arg4 : index, %arg5 : index, %arg6 : index,
168 %arg1: index, %arg2 : index, %arg3 : index, %arg4: index, %arg5 : index,
171 %0 = memref.subview %arg0[0, %arg1, %arg2] [1, %arg3, %arg4] [1, 1, 1]
197 %arg1 : vector<4xf32>, %arg2: index, %arg3 : index, %arg4 : index,
200 %0 = memref.subview %arg0[0, %arg2, %arg3] [1, %arg4, %arg5] [1, 1, 1]
227 %arg1 : vector<4xf32>, %arg2: index, %arg3 : index, %arg4 : index,
[all …]

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