Home
last modified time | relevance | path

Searched refs:aese (Results 1 – 25 of 34) sorted by relevance

12

/llvm-project-15.0.7/llvm/test/MC/AArch64/SVE2/
H A Daese-diagnostics.s7 aese z0.b, z1.b, z2.b label
16 aese z0.h, z0.h, z0.h label
21 aese z0.s, z0.s, z0.s label
26 aese z0.d, z0.d, z0.d label
36 aese z0.b, z0.b, z1.b label
42 aese z0.b, z0.b, z1.b label
H A Daese.s13 aese z0.b, z0.b, z31.b label
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dmisched-fusion-aes.ll73 ; CHECK: aese.8 [[QA:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
76 ; CHECK: aese.8 [[QB:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
79 ; CHECK: aese.8 [[QC:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
81 ; CHECK: aese.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
83 ; CHECK: aese.8 [[QD:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
86 ; CHECK: aese.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
87 ; CHECK: aese.8 [[QE:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
90 ; CHECK: aese.8 [[QF:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
93 ; CHECK: aese.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
94 ; CHECK: aese.8 [[QG:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
[all …]
H A Daes-erratum-fix.ll32 ; CHECK-FIX-NEXT: aese.8 q9, q8
52 ; CHECK-FIX-NEXT: aese.8 q0, q8
73 ; CHECK-FIX-NEXT: aese.8 q0, q8
94 ; CHECK-FIX-NEXT: aese.8 q0, q8
111 ; CHECK-FIX-NEXT: aese.8 q9, q8
128 ; CHECK-FIX-NEXT: aese.8 q1, q0
141 ; CHECK-FIX-NEXT: aese.8 q9, q8
145 ; CHECK-FIX-NEXT: aese.8 q8, q9
167 ; CHECK-FIX-NEXT: aese.8 q1, q0
169 ; CHECK-FIX-NEXT: aese.8 q8, q0
[all …]
H A Dintrinsics-crypto.ll8 %tmp4 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %tmp3, <16 x i8> %tmp2)
9 ; CHECK: aese.8 q{{[0-9]+}}, q{{[0-9]+}}
47 declare <16 x i8> @llvm.arm.neon.aese(<16 x i8>, <16 x i8>)
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dmisched-fusion-aes.ll22 declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %d, <16 x i8> %k)
92 ; CHECK: aese [[VA:v[0-7].16b]], {{v[0-7].16b}}
94 ; CHECK: aese [[VB:v[0-7].16b]], {{v[0-7].16b}}
96 ; CHECK: aese [[VC:v[0-7].16b]], {{v[0-7].16b}}
98 ; CHECK: aese [[VD:v[0-7].16b]], {{v[0-7].16b}}
100 ; CHECK: aese [[VE:v[0-7].16b]], {{v[0-7].16b}}
102 ; CHECK: aese [[VF:v[0-7].16b]], {{v[0-7].16b}}
104 ; CHECK: aese [[VG:v[0-7].16b]], {{v[0-7].16b}}
106 ; CHECK: aese [[VH:v[0-7].16b]], {{v[0-7].16b}}
216 ; CHECK: aese [[VA:v[0-7].16b]], {{v[0-7].16b}}
[all …]
H A Dfunction-subtarget-features.ll11 %vaeseq_v.i = call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)
16 ; CHECK: aese
19 declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8>, <16 x i8>)
H A Dsve2-intrinsics-crypto.ll38 ; CHECK-NEXT: aese z0.b, z0.b, z1.b
40 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.aese(<vscale x 16 x i8> %a,
103 declare <vscale x 16 x i8> @llvm.aarch64.sve.aese(<vscale x 16 x i8>, <vscale x 16 x i8>)
H A Darm64-crypto.ll4 declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)
11 ; CHECK: aese.16b v0, v1
12 %res = call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i8> %key)
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Ddirective-arch-negative.s9 aese v0.8h, v1.8h
12 # CHECK-NEXT: aese v0.8h, v1.8h
17 aese v0.8h, v1.8h
20 # CHECK-NEXT: aese v0.8h, v1.8h
27 aese v0.8h, v1.8h
30 # CHECK-NEXT: aese v0.8h, v1.8h
H A Darm64-crypto.s5 aese.16b v0, v1
21 ; CHECK: aese.16b v0, v1 ; encoding: [0x20,0x48,0x28,0x4e]
37 aese v2.16b, v3.16b
42 ; CHECK: aese.16b v2, v3 ; encoding: [0x62,0x48,0x28,0x4e]
H A Ddirective-arch_extension-negative.s37 aese v0.16b, v1.16b label
40 aese v0.16b, v1.16b label
H A Dneon-crypto.s10 aese v0.16b, v1.16b
H A Ddirective-cpu.s28 aese v0.16b, v1.16b label
H A Ddirective-cpu-err.s47 aese v0.16b, v1.16b
H A Ddirective-arch_extension.s20 aese v0.16b, v1.16b label
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/AArch64/Exynos/
H A Daes.s6 aese v0.16b, v1.16b label
44 # M3-NEXT: 1 1 0.50 aese v0.16b, v1.16b
49 # M4-NEXT: 1 1 0.50 aese v0.16b, v1.16b
54 # M5-NEXT: 1 2 0.50 aese v0.16b, v1.16b
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ARM/
H A Daes-intrinsics.ll6 ; CHECK-NEXT: %data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data, <16 x i8> %ke…
9 …%data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> zeroinitializer)
16 ; CHECK-NEXT: %data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8>…
19 …%data.aes = tail call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %data.xor, <16 x i8> <i8 -1, i8 -1, …
42 declare <16 x i8> @llvm.arm.neon.aese(<16 x i8>, <16 x i8>) #0
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/AArch64/
H A Daes-intrinsics.ll6 ; CHECK-NEXT: %data.aes = tail call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data, <16 x i…
9 …%data.aes = tail call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data.xor, <16 x i8> zeroiniti…
16 ; CHECK-NEXT: %data.aes = tail call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data.xor, <16…
19 …%data.aes = tail call <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8> %data.xor, <16 x i8> <i8 -1, i…
42 declare <16 x i8> @llvm.aarch64.crypto.aese(<16 x i8>, <16 x i8>) #0
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dthumb-neon-crypto.s5 aese.8 q0, q1
6 @ CHECK: aese.8 q0, q1 @ encoding: [0xb0,0xff,0x02,0x03]
H A Dneon-crypto.s5 aese.8 q0, q1
9 @ CHECK: aese.8 q0, q1 @ encoding: [0x02,0x03,0xb0,0xf3]
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Darm64-crypto.txt19 # CHECK: aese v0.16b, v1.16b
34 # CHECK-APPLE: aese.16b v0, v1
H A Dmattr-all.txt4 # CHECK: aese v0.16b, v1.16b
/llvm-project-15.0.7/llvm/test/Bindings/llvm-c/ARM/
H A Ddisassemble.test6 ;CHECK: 02 03 b0 f3 aese.8 q0, q1
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dselect-intrinsic-crypto-aesmc.mir23 %2:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aese), %0, %1

12