| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | leaFixup64.mir | 176 adjustsStack: false
214 adjustsStack: false
252 adjustsStack: false
289 adjustsStack: false
327 adjustsStack: false
365 adjustsStack: false
403 adjustsStack: false
442 adjustsStack: false
481 adjustsStack: false
519 adjustsStack: false
[all …]
|
| H A D | leaFixup32.mir | 99 adjustsStack: false
137 adjustsStack: false
175 adjustsStack: false
213 adjustsStack: false
252 adjustsStack: false
291 adjustsStack: false
328 adjustsStack: false
367 adjustsStack: false
405 adjustsStack: false
443 adjustsStack: false
[all …]
|
| H A D | expand-call-rvmarker.mir | 49 adjustsStack: true
82 adjustsStack: true
117 adjustsStack: true
153 adjustsStack: true
|
| /llvm-project-15.0.7/llvm/test/CodeGen/VE/Scalar/ |
| H A D | fold-imm-addsl.mir | 29 adjustsStack: false
84 adjustsStack: false
139 adjustsStack: false
194 adjustsStack: false
|
| H A D | fold-imm-cmpsl.mir | 29 adjustsStack: false
84 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/test/CodeGen/MIR/Generic/ |
| H A D | frame-info.mir | 37 # CHECK-NEXT: adjustsStack: false
72 # CHECK-NEXT: adjustsStack: true
91 adjustsStack: true
|
| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | convert-rr-to-ri-instrs-out-of-range.mir | 238 adjustsStack: false
288 adjustsStack: false
344 adjustsStack: false
407 adjustsStack: false
466 adjustsStack: false
524 adjustsStack: false
586 adjustsStack: false
644 adjustsStack: false
703 adjustsStack: false
761 adjustsStack: false
[all …]
|
| H A D | convert-rr-to-ri-instrs.mir | 1040 adjustsStack: false
1096 adjustsStack: false
1156 adjustsStack: false
1217 adjustsStack: false
1276 adjustsStack: false
1331 adjustsStack: false
1381 adjustsStack: false
1435 adjustsStack: false
1490 adjustsStack: false
1544 adjustsStack: false
[all …]
|
| H A D | convert-rr-to-ri-instrs-R0-special-handling.mir | 107 adjustsStack: false
161 adjustsStack: false
215 adjustsStack: false
268 adjustsStack: false
318 adjustsStack: false
366 adjustsStack: false
413 adjustsStack: false
|
| H A D | rlwinm_rldicl_to_andi.mir | 103 adjustsStack: false
163 adjustsStack: false
223 adjustsStack: false
280 adjustsStack: false
334 adjustsStack: false
388 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/GlobalISel/ |
| H A D | x86_64-legalize-srem.mir | 54 adjustsStack: false
113 adjustsStack: false
170 adjustsStack: false
223 adjustsStack: false
|
| H A D | x86_64-legalize-urem.mir | 54 adjustsStack: false
113 adjustsStack: false
170 adjustsStack: false
223 adjustsStack: false
|
| H A D | x86_64-legalize-udiv.mir | 54 adjustsStack: false
113 adjustsStack: false
170 adjustsStack: false
223 adjustsStack: false
|
| H A D | x86_64-select-udiv.mir | 54 adjustsStack: false
115 adjustsStack: false
176 adjustsStack: false
233 adjustsStack: false
|
| H A D | x86_64-select-urem.mir | 54 adjustsStack: false
115 adjustsStack: false
176 adjustsStack: false
233 adjustsStack: false
|
| H A D | x86_64-select-srem.mir | 54 adjustsStack: false
115 adjustsStack: false
175 adjustsStack: false
231 adjustsStack: false
|
| H A D | x86-legalize-udiv.mir | 49 adjustsStack: false
108 adjustsStack: false
165 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | shrink-vop3-carry-out.mir | 62 adjustsStack: false
146 adjustsStack: false
230 adjustsStack: false
313 adjustsStack: false
398 adjustsStack: false
483 adjustsStack: false
|
| H A D | fold-imm-f16-f32.mir | 146 adjustsStack: false
209 adjustsStack: false
276 adjustsStack: false
346 adjustsStack: false
412 adjustsStack: false
478 adjustsStack: false
547 adjustsStack: false
612 adjustsStack: false
674 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Lanai/ |
| H A D | peephole-compare.mir | 198 adjustsStack: false
241 adjustsStack: false
285 adjustsStack: false
331 adjustsStack: false
377 adjustsStack: false
423 adjustsStack: false
469 adjustsStack: false
532 adjustsStack: false
623 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/micromips-sizereduction/ |
| H A D | micromips-no-lwp-swp.mir | 38 adjustsStack: true
97 adjustsStack: true
156 adjustsStack: true
215 adjustsStack: true
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/ |
| H A D | unaligned-memops-mapping.mir | 41 adjustsStack: false
87 adjustsStack: false
|
| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPrologEpilogPass.cpp | 232 if (MFI.adjustsStack() && TFI.hasReservedCallFrame(Fn)) in calculateFrameObjectOffsets()
241 if (MFI.adjustsStack() || MFI.hasVarSizedObjects() || in calculateFrameObjectOffsets()
|
| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/longbranch/ |
| H A D | branch-limits-int-mipsr6.mir | 162 adjustsStack: false
249 adjustsStack: false
336 adjustsStack: false
423 adjustsStack: false
510 adjustsStack: false
597 adjustsStack: false
684 adjustsStack: false
771 adjustsStack: false
858 adjustsStack: false
945 adjustsStack: false
[all …]
|
| H A D | branch-limits-int-micromipsr6.mir | 162 adjustsStack: false
249 adjustsStack: false
336 adjustsStack: false
423 adjustsStack: false
510 adjustsStack: false
597 adjustsStack: false
684 adjustsStack: false
771 adjustsStack: false
858 adjustsStack: false
945 adjustsStack: false
[all …]
|