| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | store-merging.ll | 15 store i8 5, i8 *%addr2 29 store i16 5, i16 *%addr2 45 store i16 5, i16 *%addr2 63 store i32 5, i32 *%addr2 77 store i64 5, i64 *%addr2 115 store i32 5, i32 *%addr2 132 store i32 5, i32 *%addr2 150 store i8 %v2, i8 *%addr2 197 store i16 5, i16 *%addr2 224 store i16 5, i16 *%addr2 [all …]
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| H A D | store-merging.mir | 11 store i8 5, i8* %addr2, align 1 19 store i16 5, i16* %addr2, align 2 27 store i16 5, i16* %addr2, align 2 39 store i32 5, i32* %addr2, align 4 47 store i64 5, i64* %addr2, align 8 64 store i32 5, i32* %addr2, align 4 72 store i32 5, i32* %addr2, align 4 84 store i8 %v2, i8* %addr2, align 1 108 store i16 5, i16* %addr2, align 2 122 store i16 5, i16* %addr2, align 2 [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | sve-intrinsics-ldN-reg+reg-addr-mode.ll | 11 %addr2 = getelementptr i8, i8 * %addr, i64 %a 22 %addr2 = getelementptr i16, i16 * %addr, i64 %a 32 %addr2 = getelementptr half, half * %addr, i64 %a 53 %addr2 = getelementptr i32, i32 * %addr, i64 %a 74 %addr2 = getelementptr i64, i64 * %addr, i64 %a 95 %addr2 = getelementptr i8, i8 * %addr, i64 %a 106 %addr2 = getelementptr i16, i16 * %addr, i64 %a 137 %addr2 = getelementptr i32, i32 * %addr, i64 %a 158 %addr2 = getelementptr i64, i64 * %addr, i64 %a 179 %addr2 = getelementptr i8, i8 * %addr, i64 %a [all …]
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| H A D | sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll | 11 %addr2 = getelementptr i8, i8 * %addr, i64 %a 22 %addr2 = getelementptr i16, i16 * %addr, i64 %a 32 %addr2 = getelementptr half, half * %addr, i64 %a 53 %addr2 = getelementptr i32, i32 * %addr, i64 %a 74 %addr2 = getelementptr i64, i64 * %addr, i64 %a 95 %addr2 = getelementptr i8, i8 * %addr, i64 %a 106 %addr2 = getelementptr i16, i16 * %addr, i64 %a 137 %addr2 = getelementptr i32, i32 * %addr, i64 %a 158 %addr2 = getelementptr i64, i64 * %addr, i64 %a 179 %addr2 = getelementptr i8, i8 * %addr, i64 %a [all …]
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| H A D | aarch64-codegen-prepare-atp.ll | 21 %addr2 = getelementptr inbounds i64, i64* %P2, i64 %s2 22 store i64 %s2, i64* %addr2 42 %addr2 = getelementptr inbounds i64, i64* %P2, i64 %s2 43 store i64 %s2, i64* %addr2 59 %addr2 = getelementptr inbounds i64, i64* %base, i64 %s2 63 %v2 = load i64, i64* %addr2
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| H A D | paired-load.ll | 9 %addr2 = getelementptr i64, i64* %q, i32 1 14 store i64 %y, i64* %addr2
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| /llvm-project-15.0.7/compiler-rt/test/tsan/ |
| H A D | java_find.cpp | 44 const jptr addr2 = addr1 + size1; in main() local 48 const jptr addr3 = addr2 + size2; in main() 55 verify_find(jheap + 8, jheap_end, addr2, size2); in main() 56 verify_find(addr2 + 8, jheap_end, addr3, size3); in main() 59 __tsan_java_move(addr2, addr4, size2); in main()
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| /llvm-project-15.0.7/openmp/runtime/test/tasking/ |
| H A D | kmp_task_reduction_nest.cpp | 276 void *addr2; in main() local 278 addr2 = __kmpc_task_reduction_get_th_data(gtid, tg1, addr1); // from private in main() 279 if (addr1 != addr2) { in main() 282 printf("Wrong thread-specific addresses %d s:%p p:%p\n", tid, addr1, addr2); in main() 287 addr2 = __kmpc_task_reduction_get_th_data(gtid, NULL, ptrs[tid-1]); in main() 288 if (addr1 != addr2) { in main() 292 tid, addr1, addr2); in main() 297 addr2 = __kmpc_task_reduction_get_th_data(gtid, NULL, ptrs[nthreads-1]); in main() 298 if (addr1 != addr2) { in main() 302 tid, addr1, addr2); in main()
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | thumb1-varalloc.ll | 67 %addr2.32 = alloca i32 68 %addr2 = bitcast i32* %addr2.32 to i8* 77 call void @take_ptr(i8* %addr2) 87 %addr2.32 = alloca i32, i32 257 101 %addr2 = alloca i8, i32 1020 116 %addr2 = alloca i8, i32 1268
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| H A D | combine-vmovdrr.ll | 10 define void @motivatingExample(<2 x i64>* %addr, <8 x i8>* %addr2) { 19 %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2 25 store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2 30 define void @dynamicIndex(<2 x i64>* %addr, <8 x i8>* %addr2, i32 %index) { 62 %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2 68 store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2 74 define i64 @severalUses(<2 x i64>* %addr, <8 x i8>* %addr2) { 85 %vtbl2.i25.i = load <8 x i8>, <8 x i8>* %addr2 91 store <8 x i8> %vtbl2.i25.i313, <8 x i8>* %addr2
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| /llvm-project-15.0.7/clang/test/CodeGenOpenCL/ |
| H A D | amdgpu-nullptr.cl | 377 #define TEST_EQ00(addr1, addr2) int test_eq00_##addr1##_##addr2(void) { return (addr1 char*)0 == (a… 378 #define TEST_EQ0N(addr1, addr2) int test_eq0N_##addr1##_##addr2(void) { return (addr1 char*)0 == (a… 379 #define TEST_EQN0(addr1, addr2) int test_eqN0_##addr1##_##addr2(void) { return (addr1 char*)NULL ==… 380 #define TEST_EQNN(addr1, addr2) int test_eqNN_##addr1##_##addr2(void) { return (addr1 char*)0 == (a… 381 #define TEST_NE00(addr1, addr2) int test_ne00_##addr1##_##addr2(void) { return (addr1 char*)0 != (a… 382 #define TEST_NE0N(addr1, addr2) int test_ne0N_##addr1##_##addr2(void) { return (addr1 char*)0 != (a… 383 #define TEST_NEN0(addr1, addr2) int test_neN0_##addr1##_##addr2(void) { return (addr1 char*)NULL !=… 384 #define TEST_NENN(addr1, addr2) int test_neNN_##addr1##_##addr2(void) { return (addr1 char*)0 != (a… 385 #define TEST(addr1, addr2) \ 386 TEST_EQ00(addr1, addr2) \ [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| H A D | load-store-q.ll | 16 %addr2 = getelementptr double, double* %q, i32 1 22 store double %y, double* %addr2 38 %addr2 = getelementptr double, double* %q, i32 1 41 store double %p2, double* %addr2
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| /llvm-project-15.0.7/llvm/test/SafepointIRVerifier/ |
| H A D | use-derived-unrelocated.ll | 100 %addr2 = getelementptr i8, i8 addrspace(1)* %base2, i64 8 101 %cmp = icmp eq i8 addrspace(1)* %addr1, %addr2 103 ; CHECK-NEXT: Def: %addr2 = getelementptr i8, i8 addrspace(1)* %base2, i64 8 104 ; CHECK-NEXT: Use: %val = load i8, i8 addrspace(1)* %addr2 105 %val = load i8, i8 addrspace(1)* %addr2 118 %addr2 = getelementptr i8, i8 addrspace(1)* %base2, i64 8 122 %cmp = icmp eq i8 addrspace(1)* %addr1, %addr2 125 ; CHECK-NEXT: Use: %val = load i8, i8 addrspace(1)* %addr2 126 %val = load i8, i8 addrspace(1)* %addr2 140 %addr2 = getelementptr i8, i8 addrspace(1)* %base2, i64 %arg [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | fma-do-not-commute.ll | 11 ; %addr2 lives in rsi. 15 define void @test1(ptr %addr, ptr %addr2, float %arg) { 22 %addr2Val = load float, ptr %addr2, align 4
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| H A D | const-base-addr.ll | 16 %addr2 = getelementptr %T, ptr inttoptr (i64 123456789012345678 to ptr), i32 0, i32 2 17 %tmp2 = load i32, ptr %addr2
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | arm-vector-align.c | 15 void t1(AlignedAddr *addr1, AlignedAddr *addr2) { in t1() argument 20 vst1q_f32(addr2, a); in t1()
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| /llvm-project-15.0.7/llvm/test/Transforms/Coroutines/ |
| H A D | coro-split-musttail.ll | 23 %addr2 = call i8* @llvm.coro.subfn.addr(i8* null, i8 0) 24 %pv2 = bitcast i8* %addr2 to void (i8*)* 45 ; CHECK: %[[addr2:.+]] = call i8* @llvm.coro.subfn.addr(i8* null, i8 0) 46 ; CHECK-NEXT: %[[pv2:.+]] = bitcast i8* %[[addr2]] to void (i8*)*
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| /llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/ |
| H A D | scev-aa.ll | 225 ; CHECK: NoAlias: double* %addr2, double* %data 226 ; CHECK: MayAlias: double* %addr1, double* %addr2 253 %addr2 = getelementptr double, double* %data, i32 %iv2 254 store double 0.0, double* %addr2 269 ; CHECK: MayAlias: double* %addr2, double* %data 270 ; CHECK: MayAlias: double* %addr1, double* %addr2 296 %addr2 = call double* @get_addr(i32 %iv2) 297 store double 0.0, double* %addr2 311 ; CHECK: NoAlias: double* %addr2, double* %data 312 ; CHECK: NoAlias: double* %addr1, double* %addr2 [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/X86/ |
| H A D | delete-dead-cast-inst.ll | 14 ; CHECK-NEXT: %addr2 = getelementptr %T, %T* %1, i32 0, i32 2 18 %addr2 = getelementptr %T, %T* %base, i32 0, i32 2
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| H A D | const-base-addr.ll | 16 %addr2 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 2 17 %tmp2 = load i32, i32* %addr2
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/ |
| H A D | combine-store-fp.ll | 14 %addr2 = getelementptr float, float * %ptr, i64 2 16 store float 0.000000e+00, float * %addr2, align 4
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| /llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/PowerPC/ |
| H A D | const-base-addr.ll | 15 %addr2 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 2 16 %tmp2 = load i32, i32* %addr2
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | fp-strict-conv.ll | 331 define void @fptoint_nofpexcept_f64(double %m, i32* %addr1, i64* %addr2) { 344 store volatile i64 %conv3, i64* %addr2, align 8 345 store volatile i64 %conv4, i64* %addr2, align 8 349 define void @fptoint_nofpexcept_f32(float %m, i32* %addr1, i64* %addr2) { 362 store volatile i64 %conv3, i64* %addr2, align 8 363 store volatile i64 %conv4, i64* %addr2, align 8 367 define void @inttofp_nofpexcept_i32(i32 %m, float* %addr1, double* %addr2) { 380 store volatile double %conv3, double* %addr2, align 8 381 store volatile double %conv4, double* %addr2, align 8 398 store volatile double %conv3, double* %addr2, align 8 [all …]
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| /llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/ |
| H A D | pr39282.ll | 15 ; Consider that %addr1 = %addr2 + 1, in which case %addr2i and %addr1i are 17 define void @pr39282(i32* %addr1, i32* %addr2) { 47 %addr2i = getelementptr inbounds i32, i32* %addr2, i32 %j
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| /llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/ARM/ |
| H A D | gep-struct-index.ll | 26 ; CHECK: %addr2 = getelementptr %T, %T* %P, i32 256, i32 256 29 %addr2 = getelementptr %T, %T* %P, i32 256, i32 256 30 %tmp2 = load i32, i32* %addr2
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