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/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dvector-promotion.ll19 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
38 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
61 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
90 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
115 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
136 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
155 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
174 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
193 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
247 %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
[all …]
H A Dthumb1-varalloc.ll65 %addr1.32 = alloca i32
66 %addr1 = bitcast i32* %addr1.32 to i8*
72 call void @take_ptr(i8* %addr1)
85 %addr1.32 = alloca i32, i32 257
86 %addr1 = bitcast i32* %addr1.32 to i8*
92 call void @take_ptr(i8* %addr1)
100 %addr1 = alloca i8, i32 4
105 call void @take_ptr(i8* %addr1)
115 %addr1 = alloca i8, i32 1
121 call void @take_ptr(i8* %addr1)
H A Dwrong-t2stmia-size-opt.ll10 %addr1 = getelementptr i32, i32* %addr, i32 1
14 store i32 %val1, i32* %addr1
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dstore-merging.ll13 store i8 4, i8 *%addr1
27 store i16 4, i16 *%addr1
43 store i16 4, i16 *%addr1
61 store i32 4, i32 *%addr1
75 store i64 4, i64 *%addr1
112 store i32 4, i32 *%addr1
130 store i32 4, i32 *%addr1
148 store i8 %v1, i8 *%addr1
195 store i16 4, i16 *%addr1
221 store i16 4, i16 *%addr1
[all …]
/llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_addrhashmap.h122 if (addr1 != 0) in ForEach()
123 cb(addr1, c->val, arg); in ForEach()
132 if (addr1 != 0) in ForEach()
227 if (addr1 == addr) { in acquire()
240 if (addr1 == addr) { in acquire()
256 if (addr1 == addr) { in acquire()
272 if (addr1 == addr) { in acquire()
296 if (addr1 == 0) { in acquire()
343 CHECK_EQ(addr1, 0); in release()
350 CHECK_EQ(addr1, h->addr_); in release()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dldst-16-byte.mir166 %addr1:g8rc = COPY $x4
168 %1:g8prc = LQARX %addr0, %addr1
169 %2:g8prc = LQARX %addr0, %addr1
170 %3:g8prc = LQARX %addr0, %addr1
171 %4:g8prc = LQARX %addr0, %addr1
172 %5:g8prc = LQARX %addr0, %addr1
173 %6:g8prc = LQARX %addr0, %addr1
174 %7:g8prc = LQARX %addr0, %addr1
175 %8:g8prc = LQARX %addr0, %addr1
176 %9:g8prc = LQARX %addr0, %addr1
[all …]
H A Dfp-strict-conv.ll331 define void @fptoint_nofpexcept_f64(double %m, i32* %addr1, i64* %addr2) {
342 store volatile i32 %conv1, i32* %addr1, align 4
343 store volatile i32 %conv2, i32* %addr1, align 4
349 define void @fptoint_nofpexcept_f32(float %m, i32* %addr1, i64* %addr2) {
360 store volatile i32 %conv1, i32* %addr1, align 4
361 store volatile i32 %conv2, i32* %addr1, align 4
367 define void @inttofp_nofpexcept_i32(i32 %m, float* %addr1, double* %addr2) {
378 store volatile float %conv1, float* %addr1, align 4
379 store volatile float %conv2, float* %addr1, align 4
396 store volatile float %conv1, float* %addr1, align 4
[all …]
H A Dnofpexcept.ll72 define void @fptoint_nofpexcept(ppc_fp128 %p, fp128 %m, i32* %addr1, i64* %addr2) {
87 ; CHECK-NEXT: STW killed [[MFVSRWZ]], 0, [[COPY1]] :: (volatile store (s32) into %ir.addr1)
92 ; CHECK-NEXT: STW killed [[MFVSRWZ1]], 0, [[COPY1]] :: (volatile store (s32) into %ir.addr1)
106 ; CHECK-NEXT: STW killed [[MFVSRWZ2]], 0, [[COPY1]] :: (volatile store (s32) into %ir.addr1)
148 ; CHECK-NEXT: STW killed [[XOR]], 0, [[COPY1]] :: (volatile store (s32) into %ir.addr1)
152 store volatile i32 %conv1, i32* %addr1, align 4
154 store volatile i32 %conv2, i32* %addr1, align 4
161 store volatile i32 %conv5, i32* %addr1, align 4
163 store volatile i32 %conv6, i32* %addr1, align 4
/llvm-project-15.0.7/openmp/runtime/test/tasking/
H A Dkmp_task_reduction_nest.cpp275 void *addr1; in main() local
277 addr1 = __kmpc_task_reduction_get_th_data(gtid, tg1, &xp); // from shared in main()
278 addr2 = __kmpc_task_reduction_get_th_data(gtid, tg1, addr1); // from private in main()
279 if (addr1 != addr2) { in main()
282 printf("Wrong thread-specific addresses %d s:%p p:%p\n", tid, addr1, addr2); in main()
288 if (addr1 != addr2) { in main()
292 tid, addr1, addr2); in main()
298 if (addr1 != addr2) { in main()
302 tid, addr1, addr2); in main()
/llvm-project-15.0.7/clang/test/CodeGenOpenCL/
H A Damdgpu-nullptr.cl377 #define TEST_EQ00(addr1, addr2) int test_eq00_##addr1##_##addr2(void) { return (addr1 char*)0 == (a…
378 #define TEST_EQ0N(addr1, addr2) int test_eq0N_##addr1##_##addr2(void) { return (addr1 char*)0 == (a…
379 #define TEST_EQN0(addr1, addr2) int test_eqN0_##addr1##_##addr2(void) { return (addr1 char*)NULL ==…
380 #define TEST_EQNN(addr1, addr2) int test_eqNN_##addr1##_##addr2(void) { return (addr1 char*)0 == (a…
381 #define TEST_NE00(addr1, addr2) int test_ne00_##addr1##_##addr2(void) { return (addr1 char*)0 != (a…
382 #define TEST_NE0N(addr1, addr2) int test_ne0N_##addr1##_##addr2(void) { return (addr1 char*)0 != (a…
383 #define TEST_NEN0(addr1, addr2) int test_neN0_##addr1##_##addr2(void) { return (addr1 char*)NULL !=…
384 #define TEST_NENN(addr1, addr2) int test_neNN_##addr1##_##addr2(void) { return (addr1 char*)0 != (a…
385 #define TEST(addr1, addr2) \
386 TEST_EQ00(addr1, addr2) \
[all …]
/llvm-project-15.0.7/llvm/test/SafepointIRVerifier/
H A Duse-derived-unrelocated.ll70 %addr1 = getelementptr i8, i8 addrspace(1)* %base1, i64 %arg
73 ; CHECK-NEXT: Use: %cmp = icmp eq i8 addrspace(1)* %addr1, %base2.relocated
74 %cmp = icmp eq i8 addrspace(1)* %addr1, %base2.relocated
84 %addr1 = getelementptr i8, i8 addrspace(1)* %base1, i64 %arg
91 %cmp = icmp eq i8 addrspace(1)* %addr1, %base2.relocated
98 %addr1 = getelementptr i8, i8 addrspace(1)* %base1, i64 %arg
101 %cmp = icmp eq i8 addrspace(1)* %addr1, %addr2
113 %addr1 = getelementptr i8, i8 addrspace(1)* %base1, i64 %arg
122 %cmp = icmp eq i8 addrspace(1)* %addr1, %addr2
137 %addr1 = getelementptr i8, i8 addrspace(1)* %base1, i64 %arg
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/X86/
H A Dconst-base-addr.ll13 ; CHECK: %addr1 = getelementptr %T, %T* %1, i32 0, i32 1
14 %addr1 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 1
15 %tmp1 = load i32, i32* %addr1
H A Ddelete-dead-cast-inst.ll13 ; CHECK-NEXT: %addr1 = getelementptr %T, %T* %1, i32 0, i32 1
17 %addr1 = getelementptr %T, %T* %base, i32 0, i32 1
/llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/PowerPC/
H A Dconst-base-addr.ll12 ; CHECK: %addr1 = getelementptr %T, %T* %1, i32 0, i32 1
13 %addr1 = getelementptr %T, %T* inttoptr (i32 12345678 to %T*), i32 0, i32 1
14 %tmp1 = load i32, i32* %addr1
/llvm-project-15.0.7/compiler-rt/test/tsan/
H A Djava_find.cpp40 const jptr addr1 = jheap; in main() local
44 const jptr addr2 = addr1 + size1; in main()
54 verify_find(jheap, jheap_end, addr1, size1); in main()
/llvm-project-15.0.7/llvm/test/Transforms/OpenMP/
H A Dgpu_state_machine_function_ptr_replacement.ll100 %.addr1 = alloca i32, align 4
105 store i32 %1, i32* %.addr1, align 4
107 call void @__omp_outlined__1(i32* %.addr1, i32* %.zero.addr)
136 %.addr1 = alloca i32, align 4
141 store i32 %1, i32* %.addr1, align 4
143 call void @__omp_outlined__2(i32* %.addr1, i32* %.zero.addr)
163 %.addr1 = alloca i32, align 4
168 store i32 %1, i32* %.addr1, align 4
170 call void @__omp_outlined__3(i32* %.addr1, i32* %.zero.addr)
/llvm-project-15.0.7/llvm/test/Analysis/ScalarEvolution/
H A Dscev-aa.ll224 ; CHECK: MayAlias: double* %addr1, double* %data
226 ; CHECK: MayAlias: double* %addr1, double* %addr2
245 %addr1 = getelementptr double, double* %data, i32 %iv1
246 store double 0.0, double* %addr1
268 ; CHECK: MayAlias: double* %addr1, double* %data
270 ; CHECK: MayAlias: double* %addr1, double* %addr2
288 %addr1 = call double* @get_addr(i32 %iv1)
289 store double 0.0, double* %addr1
310 ; CHECK: MayAlias: double* %addr1, double* %data
312 ; CHECK: NoAlias: double* %addr1, double* %addr2
[all …]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Darm-vector-align.c15 void t1(AlignedAddr *addr1, AlignedAddr *addr2) { in t1() argument
18 float32x4_t a = vld1q_f32(addr1); in t1()
/llvm-project-15.0.7/llvm/test/Transforms/Coroutines/
H A Dcoro-split-musttail.ll12 %addr1 = call i8* @llvm.coro.subfn.addr(i8* null, i8 0)
13 %pv1 = bitcast i8* %addr1 to void (i8*)*
39 ; CHECK: %[[addr1:.+]] = call i8* @llvm.coro.subfn.addr(i8* null, i8 0)
40 ; CHECK-NEXT: %[[pv1:.+]] = bitcast i8* %[[addr1]] to void (i8*)*
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Daarch64-codegen-prepare-atp.ll18 %addr1 = getelementptr inbounds i64, i64* %P1, i64 %s
19 store i64 %s, i64* %addr1
38 %addr1 = getelementptr inbounds i64, i64* %P1, i64 %s
39 store i64 %s, i64* %addr1
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dcombine-store-fp.ll13 %addr1 = getelementptr float, float * %ptr, i64 1
15 store float 0.000000e+00, float * %addr1, align 4
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dconst-base-addr.ll14 %addr1 = getelementptr %T, ptr inttoptr (i64 123456789012345678 to ptr), i32 0, i32 1
15 %tmp1 = load i32, ptr %addr1
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/
H A Dpr39282.ll15 ; Consider that %addr1 = %addr2 + 1, in which case %addr2i and %addr1i are
17 define void @pr39282(i32* %addr1, i32* %addr2) {
46 %addr1i = getelementptr inbounds i32, i32* %addr1, i32 %j
/llvm-project-15.0.7/llvm/test/Transforms/ConstantHoisting/ARM/
H A Dgep-struct-index.ll25 ; CHECK: %addr1 = getelementptr %T, %T* %P, i32 256, i32 256
27 %addr1 = getelementptr %T, %T* %P, i32 256, i32 256
28 %tmp1 = load i32, i32* %addr1
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dnoalias.ll4 define void @test_inside(i32* %addr1, i32* %addr2) {
33 %addr1i = getelementptr inbounds i32, i32* %addr1, i32 %j
48 define void @test_outside(i32* %addr1, i32* %addr2) {
75 %addr1i = getelementptr inbounds i32, i32* %addr1, i32 %j

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