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/llvm-project-15.0.7/compiler-rt/test/fuzzer/
H A DMultipleConstraintsOnSmallInputTest.cpp16 char v = (a1 ^ a2); in func1()
120 char v = ~a1; in func14()
144 char v = ~a1; in func17()
184 char v = ~a1; in func22()
208 char v = ~a1; in func25()
232 char v = ~a1; in func28()
248 char v = ~a1; in func30()
272 char v = ~a1; in func33()
304 char v = ~a1; in func37()
352 char v = ~a1; in func43()
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dsadd_sat_plus.ll19 ; RV32I-NEXT: mul a1, a1, a2
22 ; RV32I-NEXT: slti a1, a1, 0
34 ; RV64I-NEXT: mulw a1, a1, a2
68 ; RV64IZbb-NEXT: mulw a1, a1, a2
100 ; RV32I-NEXT: sltu a1, a0, a1
101 ; RV32I-NEXT: add a1, a3, a1
110 ; RV32I-NEXT: xor a1, a0, a1
118 ; RV64I-NEXT: slt a1, a0, a1
124 ; RV64I-NEXT: slli a1, a1, 63
202 ; RV32I-NEXT: mul a1, a1, a2
[all …]
H A Dctlz-cttz-ctpop.ll38 ; RV32_NOZBB-NEXT: andi a1, a1, 85
61 ; RV64NOZBB-NEXT: andi a1, a1, 85
183 ; RV32I-NEXT: and a1, a1, a2
186 ; RV32I-NEXT: addi a1, a1, 819
220 ; RV64I-NEXT: and a1, a1, a2
254 ; RV32M-NEXT: and a1, a1, a2
287 ; RV64M-NEXT: and a1, a1, a2
342 ; RV32I-NEXT: and a1, a1, s4
364 ; RV32I-NEXT: and a1, a1, s4
444 ; RV32M-NEXT: not a1, a1
[all …]
H A Ddiv-pow2.ll85 ; RV32I-NEXT: srli a1, a1, 21
101 ; RV64I-NEXT: srliw a1, a1, 21
123 ; RV32I-NEXT: srli a1, a1, 21
372 ; RV32I-NEXT: neg a1, a1
386 ; RV32ZBT-NEXT: neg a1, a1
469 ; RV32I-NEXT: neg a1, a1
569 ; RV32I-NEXT: neg a1, a1
669 ; RV32I-NEXT: neg a1, a1
727 ; RV32ZBT-NEXT: fsri a1, a1, a1, 31
768 ; RV32I-NEXT: neg a1, a1
[all …]
H A Dssub_sat_plus.ll34 ; RV64I-NEXT: mulw a1, a1, a2
53 ; RV64IZbb-NEXT: mulw a1, a1, a2
152 ; RV32I-NEXT: mul a1, a1, a2
153 ; RV32I-NEXT: slli a1, a1, 16
154 ; RV32I-NEXT: srai a1, a1, 16
157 ; RV32I-NEXT: addi a1, a1, -1
176 ; RV64I-NEXT: mulw a1, a1, a2
177 ; RV64I-NEXT: slli a1, a1, 48
178 ; RV64I-NEXT: srai a1, a1, 48
231 ; RV32I-NEXT: mul a1, a1, a2
[all …]
H A Ddiv-by-constant.ll18 ; RV32-NEXT: addi a1, a1, -819
27 ; RV64-NEXT: addiw a1, a1, -819
28 ; RV64-NEXT: slli a1, a1, 32
41 ; RV32-NEXT: addi a1, a1, -1755
42 ; RV32-NEXT: mulhu a1, a0, a1
55 ; RV64-NEXT: mulhu a1, a1, a2
56 ; RV64-NEXT: srli a1, a1, 32
105 ; RV64-NEXT: mulhu a1, a0, a1
140 ; RV32IM-NEXT: mul a1, a1, a2
141 ; RV32IM-NEXT: srli a1, a1, 8
[all …]
H A Dsrem-lkk.ll25 ; RV32IM-NEXT: addi a1, a1, 389
26 ; RV32IM-NEXT: mulh a1, a0, a1
27 ; RV32IM-NEXT: add a1, a1, a0
29 ; RV32IM-NEXT: srai a1, a1, 6
30 ; RV32IM-NEXT: add a1, a1, a2
32 ; RV32IM-NEXT: mul a1, a1, a2
52 ; RV64IM-NEXT: mul a1, a1, a2
53 ; RV64IM-NEXT: srli a1, a1, 32
54 ; RV64IM-NEXT: addw a1, a1, a0
56 ; RV64IM-NEXT: sraiw a1, a1, 6
[all …]
H A Diabs.ll25 ; RV32I-NEXT: srai a1, a1, 31
40 ; RV32ZBT-NEXT: srai a1, a1, 31
48 ; RV64I-NEXT: srai a1, a1, 63
75 ; RV32I-NEXT: srai a1, a1, 31
98 ; RV64I-NEXT: srai a1, a1, 63
325 ; RV32I-NEXT: neg a1, a1
336 ; RV32ZBB-NEXT: neg a1, a1
383 ; RV32I-NEXT: neg a1, a1
452 ; RV32I-NEXT: snez a1, a1
535 ; RV64I-NEXT: neg a1, a1
[all …]
H A Dsadd_sat.ll21 ; RV32I-NEXT: slti a1, a1, 0
52 ; RV32IZbbNOZbt-NEXT: slti a1, a1, 0
74 ; RV32IZbbZbt-NEXT: slti a1, a1, 0
78 ; RV32IZbbZbt-NEXT: xor a1, a1, a3
92 ; RV32I-NEXT: sltu a1, a0, a1
93 ; RV32I-NEXT: add a1, a5, a1
102 ; RV32I-NEXT: xor a1, a0, a1
111 ; RV64I-NEXT: slti a1, a1, 0
116 ; RV64I-NEXT: slli a1, a1, 63
193 ; RV32I-NEXT: addi a1, a1, -1
[all …]
H A Dsrem-seteq-illegal-types.ll15 ; RV32-NEXT: addi a1, a1, 331
18 ; RV32-NEXT: addi a1, a1, -83
23 ; RV32-NEXT: addi a1, a1, -165
34 ; RV64-NEXT: addiw a1, a1, 331
37 ; RV64-NEXT: addiw a1, a1, -83
42 ; RV64-NEXT: addiw a1, a1, -165
51 ; RV32M-NEXT: addi a1, a1, 331
54 ; RV32M-NEXT: addi a1, a1, -83
330 ; RV32-NEXT: neg a1, a1
425 ; RV64-NEXT: snez a1, a1
[all …]
H A Dssub_sat.ll59 ; RV32IZbbZbt-NEXT: sub a1, a0, a1
77 ; RV32NoZbt-NEXT: sub a1, a5, a1
88 ; RV32NoZbt-NEXT: xor a1, a0, a1
101 ; RV64NoZbt-NEXT: slli a1, a1, 63
115 ; RV32IZbbZbt-NEXT: xor a1, a1, a3
116 ; RV32IZbbZbt-NEXT: and a1, a1, a7
126 ; RV64IZbbZbt-NEXT: sub a1, a0, a1
144 ; RV32I-NEXT: addi a1, a1, -1
163 ; RV64I-NEXT: addiw a1, a1, -1
182 ; RV32IZbb-NEXT: addi a1, a1, -1
[all …]
H A Dbswap-bitreverse.ll75 ; RV32I-NEXT: and a1, a1, a2
77 ; RV32I-NEXT: or a1, a1, a2
91 ; RV64I-NEXT: and a1, a1, a2
93 ; RV64I-NEXT: or a1, a1, a2
139 ; RV32I-NEXT: or a1, a1, a4
142 ; RV32I-NEXT: and a1, a1, a3
144 ; RV32I-NEXT: or a1, a1, a3
149 ; RV32I-NEXT: or a1, a0, a1
157 ; RV64I-NEXT: and a1, a1, a2
162 ; RV64I-NEXT: or a1, a2, a1
[all …]
H A Dmemcpy-inline.ll64 ; RV32-NEXT: addi a1, a1, %lo(.L.str1)
87 ; RV64UNALIGNED-NEXT: ld a1, 8(a1)
102 ; RV32-NEXT: addi a1, a1, %lo(.L.str2)
123 ; RV64UNALIGNED-NEXT: ld a1, 8(a1)
161 ; RV32UNALIGNED-NEXT: addi a1, a1, 69
177 ; RV64UNALIGNED-NEXT: ld a1, 8(a1)
210 ; RV32UNALIGNED-NEXT: addi a1, a1, 69
225 ; RV64UNALIGNED-NEXT: ld a1, 8(a1)
370 ; RV32-NEXT: lw a1, 0(a1)
382 ; RV64ALIGNED-NEXT: lw a1, 0(a1)
[all …]
H A Dshlimm-addimm.ll50 ; RV32I-NEXT: slli a1, a1, 5
51 ; RV32I-NEXT: or a1, a1, a2
55 ; RV32I-NEXT: add a1, a1, a2
114 ; RV32I-NEXT: slli a1, a1, 5
115 ; RV32I-NEXT: or a1, a1, a2
121 ; RV32I-NEXT: add a1, a1, a2
182 ; RV32I-NEXT: slli a1, a1, 5
183 ; RV32I-NEXT: or a1, a1, a2
189 ; RV32I-NEXT: add a1, a1, a2
251 ; RV32I-NEXT: or a1, a1, a2
[all …]
H A Duadd_sat_plus.ll28 ; RV64I-NEXT: mulw a1, a1, a2
29 ; RV64I-NEXT: addw a1, a0, a1
40 ; RV32IZbb-NEXT: mul a1, a1, a2
48 ; RV64IZbb-NEXT: mulw a1, a1, a2
126 ; RV32I-NEXT: mul a1, a1, a2
127 ; RV32I-NEXT: and a1, a1, a3
140 ; RV64I-NEXT: mul a1, a1, a2
141 ; RV64I-NEXT: and a1, a1, a3
179 ; RV32I-NEXT: mul a1, a1, a2
192 ; RV64I-NEXT: mulw a1, a1, a2
[all …]
H A Drv64zbb.ll31 ; RV64I-NEXT: and a1, a1, a2
34 ; RV64I-NEXT: addiw a1, a1, 819
42 ; RV64I-NEXT: addiw a1, a1, -241
45 ; RV64I-NEXT: addiw a1, a1, 257
85 ; RV64I-NEXT: and a1, a1, a2
88 ; RV64I-NEXT: addiw a1, a1, 819
99 ; RV64I-NEXT: addiw a1, a1, 257
148 ; RV64I-NEXT: and a1, a1, a2
206 ; RV64I-NEXT: and a1, a1, a2
275 ; RV64I-NEXT: and a1, a1, a2
[all …]
H A Durem-seteq-illegal-types.ll15 ; RV32-NEXT: addi a1, a1, -819
29 ; RV64-NEXT: addiw a1, a1, -819
41 ; RV32M-NEXT: addi a1, a1, -819
51 ; RV64M-NEXT: addiw a1, a1, -819
61 ; RV32MV-NEXT: addi a1, a1, -819
88 ; RV32-NEXT: addi a1, a1, -585
97 ; RV32-NEXT: addi a1, a1, -1755
108 ; RV64-NEXT: addiw a1, a1, -585
449 ; RV32M-NEXT: or a1, a3, a1
493 ; RV64M-NEXT: or a1, a2, a1
[all …]
H A Dneg-abs.ll117 ; RV32I-NEXT: xor a1, a1, a2
118 ; RV32I-NEXT: sub a1, a2, a1
119 ; RV32I-NEXT: sub a1, a1, a3
128 ; RV32ZBB-NEXT: xor a1, a1, a2
129 ; RV32ZBB-NEXT: sub a1, a2, a1
175 ; RV32I-NEXT: xor a1, a1, a2
176 ; RV32I-NEXT: sub a1, a2, a1
177 ; RV32I-NEXT: sub a1, a1, a3
294 ; RV32I-NEXT: neg a1, a1
312 ; RV32ZBB-NEXT: neg a1, a1
[all …]
H A Daddimm-mulimm.ll52 ; RV32IMB-NEXT: mul a1, a1, a2
54 ; RV32IMB-NEXT: add a1, a3, a1
58 ; RV32IMB-NEXT: add a1, a1, a2
122 ; RV32IMB-NEXT: mul a1, a1, a2
124 ; RV32IMB-NEXT: add a1, a3, a1
130 ; RV32IMB-NEXT: add a1, a1, a2
188 ; RV32IMB-NEXT: mul a1, a1, a2
190 ; RV32IMB-NEXT: add a1, a3, a1
196 ; RV32IMB-NEXT: add a1, a1, a2
319 ; RV32IMB-NEXT: sh1add a1, a1, a1
[all …]
H A Drv32zbb.ll30 ; RV32I-NEXT: and a1, a1, a2
33 ; RV32I-NEXT: addi a1, a1, 819
41 ; RV32I-NEXT: addi a1, a1, -241
44 ; RV32I-NEXT: addi a1, a1, 257
92 ; RV32I-NEXT: and a1, a1, s4
122 ; RV32I-NEXT: and a1, a1, s4
184 ; RV32I-NEXT: and a1, a1, a2
238 ; RV32I-NEXT: and a1, a1, s4
260 ; RV32I-NEXT: and a1, a1, s4
408 ; RV32ZBB-NEXT: cpop a1, a1
[all …]
H A Dunaligned-load-store.ll69 ; RV32I-NEXT: slli a1, a1, 8
70 ; RV32I-NEXT: or a1, a1, a2
83 ; RV64I-NEXT: slli a1, a1, 8
84 ; RV64I-NEXT: or a1, a1, a2
106 ; RV32I-NEXT: slli a1, a1, 8
107 ; RV32I-NEXT: or a1, a1, a2
116 ; RV32I-NEXT: slli a1, a1, 8
117 ; RV32I-NEXT: or a1, a1, a3
121 ; RV32I-NEXT: or a1, a0, a1
132 ; RV64I-NEXT: or a1, a1, a2
[all …]
/llvm-project-15.0.7/libcxx/test/std/containers/sequences/vector/vector.special/
H A Dswap.pass.cpp27 std::vector<int> c1(a1, a1+sizeof(a1)/sizeof(a1[0])); in tests()
33 assert(c2 == std::vector<int>(a1, a1+sizeof(a1)/sizeof(a1[0]))); in tests()
54 std::vector<int> c1(a1, a1+sizeof(a1)/sizeof(a1[0])); in tests()
61 assert(c2 == std::vector<int>(a1, a1+sizeof(a1)/sizeof(a1[0]))); in tests()
84 std::vector<int, A> c1(a1, a1+sizeof(a1)/sizeof(a1[0]), A(1, 1)); in tests()
89 assert((c2 == std::vector<int, A>(a1, a1+sizeof(a1)/sizeof(a1[0])))); in tests()
96 std::vector<int, A> c1(a1, a1+sizeof(a1)/sizeof(a1[0]), A(1)); in tests()
103 assert((c2 == std::vector<int, A>(a1, a1+sizeof(a1)/sizeof(a1[0])))); in tests()
112 std::vector<int, min_allocator<int>> c1(a1, a1+sizeof(a1)/sizeof(a1[0])); in tests()
169 std::vector<int, A> c1(a1, a1+sizeof(a1)/sizeof(a1[0]), A()); in tests()
[all …]
/llvm-project-15.0.7/llvm/test/MC/CSKY/
H A Dcompressed-inst.s6 addu32 a0, a0, a1
10 addu32 a0, a1, a0
14 addu32 a0, a1, a2
18 subu32 a0, a0, a1
22 subu32 a0, a1, a2
26 addc32 a0, a0, a1
34 addi32 a0, a1, 1
38 subi32 a0, a1, 1
78 or32 a0, a0, a1
118 revb32 a0, a1
[all …]
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drva-aliases-invalid.s11 lr.w a1, (foo) # CHECK: :[[@LINE]]:11: error: expected register
12 lr.w a1, 0(foo) # CHECK: :[[@LINE]]:12: error: expected register
15 lr.w a1, 0(a0 # CHECK: :[[@LINE]]:17: error: expected ')'
16 lr.w a1, (a0 # CHECK: :[[@LINE]]:17: error: expected ')'
21 sc.w a2, a1, (foo) # CHECK: :[[@LINE]]:15: error: expected register
22 sc.w a2, a1, 0(foo) # CHECK: :[[@LINE]]:16: error: expected register
25 sc.w a2, a1, 0(a0 # CHECK: :[[@LINE]]:21: error: expected ')'
26 sc.w a2, a1, (a0 # CHECK: :[[@LINE]]:21: error: expected ')'
35 amoswap.w a2, a1, 0(a0 # CHECK: :[[@LINE]]:26: error: expected ')'
45 amoadd.w a2, a1, 0(a0 # CHECK: :[[@LINE]]:25: error: expected ')'
[all …]
/llvm-project-15.0.7/flang/test/Lower/
H A Darray-expression-slice-1.f90346 real :: a1(10,10) variable
361 a2 = a1(4, 2:10:3)
363 if (a1(4,2) .ne. a2(1)) print *, "mismatch 1", a2(1), a1(4,2)
364 if (a1(4,5) .ne. a2(2)) print *, "mismatch 2", a2(2), a1(4,5)
365 if (a1(4,8) .ne. a2(3)) print *, "mismatch 3", a2(3), a1(4,8)
369 if (a1(4,2) .ne. a3(1)) print *, "mismatch 4", a1(4,2), a3(1)
370 if (a1(4,5) .ne. a3(5)) print *, "mismatch 5", a1(4,5), a3(5)
371 if (a1(4,8) .ne. a3(9)) print *, "mismatch 6", a1(4,8), a3(9)
377 if (a1(4,2) .ne. a2(2)) print *, "mismatch 7", a1(4,2), a2(2)
378 if (a1(4,5) .ne. a2(3)) print *, "mismatch 8", a1(4,5), a2(3)
[all …]

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