Home
last modified time | relevance | path

Searched refs:_V (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/clang/test/Analysis/
H A DPR2978.m24 id _V; field
67 @synthesize V = _V;
90 [self setV:0]; // This will release '_V'
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVSDPatterns.td51 !cast<Instruction>("VL"#!substr(vlmul.MX, 1)#"RE"#sew#"_V");
156 def : VPatBinarySDNode_VF<vop, instruction_name#"_V"#vti.ScalarSuffix,
167 (!cast<Instruction>(instruction_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX)
260 (!cast<Instruction>(inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX)
427 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
433 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
487 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
513 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
522 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
547 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
[all …]
H A DRISCVInstrInfoV.td384 def VLUXEI # n # _V :
387 def VLOXEI # n # _V :
391 def VSUXEI # n # _V :
394 def VSOXEI # n # _V :
1526 def VLSEG#nf#E#eew#_V :
1532 def VSSEG#nf#E#eew#_V :
1536 def VLSSEG#nf#E#eew#_V :
1539 def VSSSEG#nf#E#eew#_V :
1544 def VLUXSEG#nf#EI#eew#_V :
1547 def VLOXSEG#nf#EI#eew#_V :
[all …]
H A DRISCVInstrInfoVVLPatterns.td439 defm : VPatBinaryVL_VF<vop, instruction_name#"_V"#vti.ScalarSuffix,
451 (!cast<Instruction>(instruction_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK")
563 (!cast<Instruction>(inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK")
572 … (!cast<Instruction>(swapped_op_inst_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX#"_MASK")
790 (!cast<Instruction>(instruction_name#"_V"#fvti.ScalarSuffix#"_"#fvti.LMul.MX)
929 (!cast<Instruction>(instruction_name#"_V" # vti.ScalarSuffix # "_" # suffix)
936 (!cast<Instruction>(instruction_name#"_V" # vti.ScalarSuffix # "_" # suffix # "_MASK")
967 (!cast<Instruction>(instruction_name#"_V"#vti.ScalarSuffix#"_"#vti.LMul.MX)
H A DRISCVInstrInfoVPseudos.td1924 defm "_V" # f.FX : VPseudoBinary<m.vrclass, m.vrclass,
1931 defm "_V" # f.FX :
1971 defm "_V" # f.FX : VPseudoBinary<m.wvrclass, m.vrclass,
2066 def "_V" # f.FX # "M_" # m.MX :
2071 def "_V" # f.FX # "M_" # m.MX # "_TU":
2249 defm "_V" # f.FX :
2759 defm _V : VPseudoConversion<m.vrclass, m.vrclass, m>,
2765 defm _V : VPseudoConversion<m.vrclass, m.vrclass, m>,
2772 defm _V : VPseudoConversion<m.wvrclass, m.vrclass, m, constraint>;
2778 defm _V : VPseudoConversion<m.wvrclass, m.vrclass, m, constraint>,
[all …]
/llvm-project-15.0.7/libcxx/test/libcxx/
H A Dnasty_macros.compile.pass.cpp49 #define _V NASTY_MACRO macro
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DTargetLibraryInfo.def96 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAX@Z")
100 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAXABUnothrow_t@std@@@Z")
104 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAXI@Z")
108 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAX@Z")
112 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAXAEBUnothrow_t@std@@@Z")
116 TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAX_K@Z")
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td862 // _V* variants have different dst size, but the size is encoded implicitly,
1035 def _V # addr.NumWords
1039 def _V # addr.NumWords # _gfx90a
1042 def _V # addr.NumWords # _gfx10
1047 def _V # addr.NumWords # _gfx11
1057 def _V # addr.NumWords # _nsa_gfx10
1062 def _V # addr.NumWords # _nsa_gfx11
/llvm-project-15.0.7/llvm/test/Demangle/
H A Dms-basic.test240 ??_V@YAXPEAXAEAVklass@@@Z
H A Dms-operators.test206 ??_V@YAXPEAXAEAVklass@@@Z
H A Dms-mangle.test182 ??_V@YAXPAX@Z
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DSMEInstrFormats.td438 defm _V : sme_mem_ld_v_ss<mnemonic, /*is_col=*/0b1>;
568 defm _V : sme_mem_st_v_ss<mnemonic, /*is_col=*/0b1>;
837 defm _V : sme_vector_v_to_tile<mnemonic, /*is_col=*/0b1>;
1004 defm _V : sme_tile_to_vector_v<mnemonic, /*is_col=*/0b1>;
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsScheduleP5600.td351 def : InstRW<[P5600WriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)_V$")>;
H A DMipsScheduleGeneric.td1437 def : InstRW<[GenericWriteMSAShortLogic], (instregex "^(AND|OR|[XN]OR)_V$")>;