Searched refs:Z8 (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/flang/test/Semantics/ |
| H A D | io07.f90 | 7 2001 format(3I8, 3Z8)
8 2002 format(DC, F8.2, 3I8, Z8)
38 2103 format(3I8 3Z8)
41 2104 format(3I8 Z8)
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | gep-expanded-vector.ll | 21 ; CHECK-NEXT: vpaddq [[Z1]], [[Z8:%zmm[0-9]]], [[Z8]]
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| /llvm-project-15.0.7/llvm/unittests/Support/ |
| H A D | MathExtrasTest.cpp | 17 uint8_t Z8 = 0; in TEST() local
21 EXPECT_EQ(8u, countTrailingZeros(Z8)); in TEST()
37 uint8_t Z8 = 0; in TEST() local
41 EXPECT_EQ(8u, countLeadingZeros(Z8)); in TEST()
94 uint8_t Z8 = 0; in TEST() local
98 EXPECT_EQ(0xFFULL, findFirstSet(Z8)); in TEST()
114 uint8_t Z8 = 0; in TEST() local
118 EXPECT_EQ(0xFFULL, findLastSet(Z8)); in TEST()
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| /llvm-project-15.0.7/clang/test/CXX/temp/temp.param/ |
| H A D | p2.cpp | 29 template<mutable int> struct Z8; //expected-error{{invalid declaration specifier}}
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1293 case AArch64::Z7: Reg = AArch64::Z8; break; in getNextVectorRegister()
1294 case AArch64::Z8: Reg = AArch64::Z9; break; in getNextVectorRegister()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.td | 392 // must (additionally) preserve full Z8-Z23 and predicate registers P4-P15
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| H A D | AArch64RegisterInfo.td | 813 def Z8 : AArch64Reg<8, "z8", [Q8, Z8_HI]>, DwarfRegNum<[104]>;
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 2443 .Case("z8", AArch64::Z8) in matchSVEDataVectorRegName()
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