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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td122 // ORR Xd, XZR, Xm
158 // EXAMPLE: ADDrs Xn, Xm LSL #imm
166 // EXAMPLE: ADDXre Xn, Xm, UXTB #1
178 // EXTR Xn, Xm, #imm
186 // EXTR Xn, Xm, #imm
243 // EXAMPLE: LDR Xn, Xm [, lsl 3]
249 // EXAMPLE: STR Xn, Xm [, lsl 3]
256 // EXAMPLE: LDR Xn, Xm [, lsl 3]
H A DAArch64InstrFormats.td9793 bits<5> Xm;
9799 let Inst{20-16} = Xm;
10126 bits<5> Xm;
10260 bits<5> Xm;
10273 bits<5> Xm;
10314 bits<5> Xm;
10328 bits<5> Xm;
10366 bits<5> Xm;
10379 bits<5> Xm;
10416 bits<5> Xm;
[all …]
H A DAArch64InstrInfo.td2103 def : InstAlias<"mvn $Xd, $Xm", (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0), 3>;
2107 def : InstAlias<"mvn $Xd, $Xm$sh",
2108 (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh), 2>;
2127 def : Pat<(not GPR64:$Xm), (ORNXrr XZR, GPR64:$Xm)>;
/llvm-project-15.0.7/clang/docs/
H A DThinLTO.rst175 - ``cache_size_bytes=X``, ``cache_size_bytes=Xk``, ``cache_size_bytes=Xm``,
191 - ``prune_after=Xs``, ``prune_after=Xm``, ``prune_after=Xh``: Sets the
197 - ``prune_interval=Xs``, ``prune_interval=Xm``, ``prune_interval=Xh``:
/llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5039 unsigned Xm = Inst.getOperand(4).getReg(); in validateInstruction() local
5049 if (Xd == Xm) in validateInstruction()
5052 if (Xn == Xm) in validateInstruction()