Searched refs:XAND (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | rotr.ll | 59 ; GCN: v_and_b32_e32 [[XAND:v[0-9]+]], 15, [[X]] 61 ; GCN: v_lshrrev_b16_e64 [[LO:v[0-9]+]], [[XAND]], [[D]]
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| H A D | rotl.ll | 63 ; GCN: v_and_b32_e32 [[XAND:v[0-9]+]], 15, [[X]] 65 ; GCN: v_lshlrev_b16_e64 [[LO:v[0-9]+]], [[XAND]], [[D]]
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| /llvm-project-15.0.7/llvm/lib/TableGen/ |
| H A D | TGLexer.h | 55 XConcat, XADD, XSUB, XMUL, XNOT, XAND, XOR, XXOR, XSRA, XSRL, XSHL, enumerator
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| H A D | TGLexer.cpp | 567 .Case("and", tgtok::XAND) in LexExclaim()
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| H A D | TGParser.cpp | 1149 case tgtok::XAND: in ParseOperation() 1177 case tgtok::XAND: Code = BinOpInit::AND; break; in ParseOperation() 1206 case tgtok::XAND: in ParseOperation() 2415 case tgtok::XAND: in ParseSimpleValue()
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