| /llvm-project-15.0.7/clang/test/CodeGenCXX/ |
| H A D | mangle-ms-md5.cpp | 9 #define X8(X) X2(X4(X)) macro 10 #define X16(X) X2(X8(X)) 22 C4(X, X2(X), X4(X), X8(X)), \ 57 C4(X, X4(X), X4(X), X8(X)), \ 58 C4(X8(X), X32(X), X64(X), X128(X))), \ 68 C4(X2(X), X4(X), X4(X), X8(X)), \ 69 C4(X8(X), X32(X), X64(X), X128(X))), \
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| H A D | override-layout.cpp | 80 struct X8 : X6, virtual X7 { struct 93 X8 x8s[sizeof(X8)]; in use_structs() argument
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| /llvm-project-15.0.7/clang/test/CodeGen/ |
| H A D | override-layout.c | 76 union X8 { union 132 union X8 x8; in use_structs() 133 typedef int X8array[sizeof(union X8)]; in use_structs() 134 x8.y = sizeof(union X8); in use_structs()
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| /llvm-project-15.0.7/clang/test/SemaTemplate/ |
| H A D | temp_explicit.cpp | 141 template<typename T> struct X8 { }; struct 145 template struct Inner::X8<int>; member in N1::Inner 150 template struct ::N1::Inner::X8<float>;
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| /llvm-project-15.0.7/compiler-rt/lib/xray/ |
| H A D | xray_trampoline_AArch64.S | 32 STP X8, X0, [SP, #-16]! 48 LDP X8, X0, [SP], #16 85 STP X8, X0, [SP, #-16]! 100 LDP X8, X0, [SP], #16
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/ |
| H A D | copy-constructor-init.cpp | 122 class X8 : public Copyable4<int> { class 123 X8(const X8 &other) : Copyable4(other) {} in X8() function in X8
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| /llvm-project-15.0.7/clang/test/CXX/except/except.spec/ |
| H A D | p14-ir.cpp | 54 struct X8 : X6 { }; struct 61 X8(); in test()
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| /llvm-project-15.0.7/clang/test/Index/ |
| H A D | annotate-nested-name-specifier.cpp | 129 struct X8 { struct 133 struct X9 : X8 { 134 typedef X8 inherited;
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/ |
| H A D | debug-info-rvv-dbg-value.mir | 36 # CHECK0-MINUS: : DW_OP_breg8 X8-40) 39 # CHECK1-MINUS: : DW_OP_breg8 X8-48) 42 # CHECK2-MINUS: : DW_OP_breg8 X8-48, DW_OP_lit1, DW_OP_bregx VLENB+0, DW_OP_mul, DW_OP_minus) 45 # CHECK3-MINUS: : DW_OP_breg8 X8-48, DW_OP_lit2, DW_OP_bregx VLENB+0, DW_OP_mul, DW_OP_minus) 48 # CHECK4-MINUS: : DW_OP_breg8 X8-48, DW_OP_lit3, DW_OP_bregx VLENB+0, DW_OP_mul, DW_OP_minus) 51 # CHECK5-MINUS: : DW_OP_breg8 X8-48, DW_OP_lit4, DW_OP_bregx VLENB+0, DW_OP_mul, DW_OP_minus)
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| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | reserved-reg-errors.ll | 5 ; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x8 < %s 2>&1 | FileCheck %s -check-prefix=X8 6 ; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x8 < %s 2>&1 | FileCheck %s -check-prefix=X8 21 ; X8: in function caller {{.*}} Frame pointer required, but has been reserved.
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| H A D | reserved-regs.ll | 11 … llc -mtriple=riscv32 -mattr=+reserve-x8 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X8 12 … llc -mtriple=riscv64 -mattr=+reserve-x8 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X8 80 ; X8-NOT: lw s0, 81 ; X8-NOT: ld s0,
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-custom-call-saved-reg.ll | 2 ; RUN: | FileCheck %s --check-prefix=CHECK-SAVED-X8 64 ; CHECK-SAVED-X8: str x8, [sp 90 ; CHECK-SAVED-X8: ldr x8, [sp 108 ; CHECK-SAVED-X8: adrp x8, var
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| /llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-dlltool/ |
| H A D | DlltoolDriver.cpp | 45 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument 47 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
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| /llvm-project-15.0.7/lldb/test/Shell/SymbolFile/NativePDB/ |
| H A D | typedefs.cpp | 50 VarArgsFuncTypedef X8; in main() local
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 94 markSuperRegs(Reserved, RISCV::X8); // fp in getReservedRegs() 132 {/*s0*/ RISCV::X8, -2}, 294 return TFI->hasFP(MF) ? RISCV::X8 : RISCV::X2; in getFrameRegister()
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| H A D | RISCVCallingConv.td | 17 : CalleeSavedRegs<(add X1, X3, X4, X8, X9, (sequence "X%u", 18, 27))>;
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| /llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/ |
| H A D | zext-nuw.ll | 27 ; CHECK-NEXT: [[X8:%.*]] = icmp ult i32 0, 4 28 ; CHECK-NEXT: br i1 [[X8]], label [[DOTPREHEADER_LR_PH:%.*]], label [[X22]]
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| /llvm-project-15.0.7/lld/ELF/ |
| H A D | DriverUtils.cpp | 43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument 45 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
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| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | new-delete.cpp | 251 class X8 : public X6, public X7 { class 254 void f(X8 *x8) { in f()
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| /llvm-project-15.0.7/llvm/test/MC/AArch64/ |
| H A D | armv8.4a-ldst-error.s | 53 LDAPURSW X8, [SP, #-257]
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| H A D | armv8.4a-ldst.s | 119 LDAPURSW X8, [SP, #7]
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| /llvm-project-15.0.7/lld/MachO/ |
| H A D | DriverUtils.cpp | 44 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument 46 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.td | 38 // In AAPCS, an SRet is passed in X8, not X0 like a normal pointer parameter. 41 // passed in the alternative register (X0 or X1), not X8: 55 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X8]>>>, 183 // An SRet is passed in X8, not X0 like a normal pointer parameter. 184 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X8]>>>, 380 // preserves X0-X8 and Q0-Q7.
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 39 case AArch64::X8: return AArch64::W8; in getWRegFromXReg() 79 case AArch64::W8: return AArch64::X8; in getXRegFromWReg() 115 case AArch64::X8_X9_X10_X11_X12_X13_X14_X15: return AArch64::X8; in getXRegFromXRegTuple()
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| /llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-lib/ |
| H A D | LibDriver.cpp | 48 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument 50 X9, X8, OPT_##GROUP, OPT_##ALIAS, X7, X12},
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