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/llvm-project-15.0.7/clang/test/CodeGen/
H A Doverride-layout.c89 struct X10 { struct
141 struct X10 x10; in use_structs()
142 typedef int X10array[sizeof(struct X10)]; in use_structs()
143 x10.y = sizeof(struct X10); in use_structs()
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dreserved-reg-errors.ll7 ; RUN: not llc -mtriple=riscv32 -mattr=+reserve-x10 < %s 2>&1 | FileCheck %s -check-prefix=X10
8 ; RUN: not llc -mtriple=riscv64 -mattr=+reserve-x10 < %s 2>&1 | FileCheck %s -check-prefix=X10
22 ; X10: in function caller {{.*}} Argument register required, but has been reserved.
23 ; X10: in function caller {{.*}} Return value register required, but has been reserved.
H A Dreserved-regs.ll15 …lc -mtriple=riscv32 -mattr=+reserve-x10 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X10
16 …lc -mtriple=riscv64 -mattr=+reserve-x10 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X10
84 ; X10-NOT: lw a0,
85 ; X10-NOT: ld a0,
/llvm-project-15.0.7/llvm/test/MC/AArch64/
H A Darmv8.4a-ldst.s11 STLURB WZR, [X10]
12 STLURB W1, [X10]
13 STLURB W1, [X10, #-256]
H A Darmv8.4a-ldst-error.s11 STLURB W1, [X10, #-257]
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/
H A Dcopy-constructor-init.cpp132 class X10 : public Copyable4<int> { class
133 X10(const X10 &other) {} in X10() function in X10
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Darm64-reserve-call-saved-reg.ll5 …ux-gnu -mattr=+reserve-x10 -mattr=+call-saved-x10 -o - %s | FileCheck %s --check-prefixes=CHECK-X10
6 …=+reserve-x10 -mattr=+call-saved-x10 -global-isel -o - %s | FileCheck %s --check-prefixes=CHECK-X10
7 …tr=+reserve-x10 -mattr=+call-saved-x10 -fast-isel -o - %s | FileCheck %s --check-prefixes=CHECK-X10
40 ; CHECK-X10-NOT: str x10, [sp
52 ; CHECK-X10-NOT: ldr x10
60 ; CHECK-X10-NOT: str x10
69 ; CHECK-X10-NOT: ldr x10, [sp
H A Darm64-custom-call-saved-reg.ll8 ; RUN: | FileCheck %s --check-prefix=CHECK-SAVED-X10
66 ; CHECK-SAVED-X10: str x10, [sp
92 ; CHECK-SAVED-X10: ldr x10, [sp
110 ; CHECK-SAVED-X10: adrp x10, var
H A Darm64-platform-reg.ll17 …nux-gnu -mattr=+reserve-x10 -o - %s | FileCheck %s --check-prefixes=CHECK-RESERVE,CHECK-RESERVE-X10
82 ; RUN: --check-prefix=CHECK-RESERVE-X10 \
124 ; CHECK-RESERVE-X10-NOT: ldr x10,
151 ; CHECK-RESERVE-X10-NOT: ldr x10,
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dnew-delete.cpp268 struct X10 { struct
269 virtual ~X10();
275 struct X11 : X10 {
/llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-dlltool/
H A DDlltoolDriver.cpp45 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
46 {X1, X2, X10, X11, OPT_##ID, llvm::opt::Option::KIND##Class, \
/llvm-project-15.0.7/lldb/test/Shell/SymbolFile/NativePDB/
H A Dtypedefs.cpp52 A::AliasTemplate<float> X10; in main() local
/llvm-project-15.0.7/lld/ELF/
H A DDriverUtils.cpp43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
44 {X1, X2, X10, X11, OPT_##ID, opt::Option::KIND##Class, \
/llvm-project-15.0.7/lld/MachO/
H A DDriverUtils.cpp44 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
45 {X1, X2, X10, X11, OPT_##ID, Option::KIND##Class, \
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h41 case AArch64::X10: return AArch64::W10; in getWRegFromXReg()
81 case AArch64::W10: return AArch64::X10; in getXRegFromWReg()
116 case AArch64::X10_X11_X12_X13_X14_X15_X16_X17: return AArch64::X10; in getXRegFromXRegTuple()
/llvm-project-15.0.7/llvm/lib/ToolDrivers/llvm-lib/
H A DLibDriver.cpp48 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
49 {X1, X2, X10, X11, OPT_##ID, opt::Option::KIND##Class, \
/llvm-project-15.0.7/lld/MinGW/
H A DDriver.cpp70 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
71 {X1, X2, X10, X11, OPT_##ID, opt::Option::KIND##Class, \
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/X86/
H A DSpeculativeExec.ll92 ; CHECK-NEXT: [[X10:%.*]] = phi i8* [ [[A]], [[ENTRY]] ], [ [[B]], [[IF]] ], [ inttoptr (i64 10 …
93 ; CHECK-NEXT: ret i8* [[X10]]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SLSHardening.cpp159 { "__llvm_slsblr_thunk_x10", AArch64::X10},
/llvm-project-15.0.7/lld/wasm/
H A DDriver.cpp110 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
111 {X1, X2, X10, X11, OPT_##ID, opt::Option::KIND##Class, \
/llvm-project-15.0.7/lld/COFF/
H A DDriverUtils.cpp793 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X7, X8, X9, X10, X11, X12) \ argument
794 {X1, X2, X10, X11, OPT_##ID, llvm::opt::Option::KIND##Class, \
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstr64Bit.td1507 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1509 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7], Size = 8 in
1514 let Defs = [X0,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1516 let Defs = [X0,X2,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7] in
1535 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
1565 Defs = [X0,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,LR8,CTR8,CR0,CR1,CR5,CR6,CR7]
H A DPPCCallingConv.td131 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp114 {codeview::RegisterId::ARM64_X10, AArch64::X10}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td92 def X10 : RISCVReg<10,"x10", ["a0"]>, DwarfRegNum<[10]>;

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