Home
last modified time | relevance | path

Searched refs:WriteRef (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp27 WriteRef::WriteRef(unsigned SourceIndex, WriteState *WS) in WriteRef() function in llvm::mca::WriteRef
31 void WriteRef::commit() { in commit()
47 bool WriteRef::isWriteZero() const { in isWriteZero()
58 MCPhysReg WriteRef::getRegisterID() const { in getRegisterID()
504 SmallVectorImpl<WriteRef> &Writes, in collectWrites()
550 sort(Writes, [](const WriteRef &Lhs, const WriteRef &Rhs) { in collectWrites()
558 for (const WriteRef &WR : Writes) { in collectWrites()
571 SmallVector<WriteRef, 4> Writes; in checkRAWHazards()
579 for (const WriteRef &WR : Writes) { in checkRAWHazards()
640 for (WriteRef &WR : DependentWrites) { in addRegisterRead()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h38 class WriteRef {
48 WriteRef() in WriteRef() function
51 WriteRef(unsigned SourceIndex, WriteState *WS);
72 bool operator==(const WriteRef &Other) const {
187 using RegisterMapping = std::pair<WriteRef, RegisterRenamingInfo>;
237 SmallVectorImpl<WriteRef> &Writes,
238 SmallVectorImpl<WriteRef> &CommittedWrites) const;
255 void addRegisterWrite(WriteRef Write, MutableArrayRef<unsigned> UsedPhysRegs);
295 unsigned getElapsedCyclesFromWriteBack(const WriteRef &WR) const;
/llvm-project-15.0.7/llvm/lib/MCA/Stages/
H A DDispatchStage.cpp120 PRF.addRegisterWrite(WriteRef(IR.getSourceIndex(), &WS), RegisterFiles); in dispatch()
H A DInOrderIssueStage.cpp166 PRF.addRegisterWrite(WriteRef(SourceIndex, &WS), UsedRegs); in addRegisterReadWrite()