Searched refs:WidenedVT (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 6693 EVT WidenedVT = in lowerSBuffer() local
6696 AMDGPUISD::SBUFFER_LOAD, DL, DAG.getVTList(WidenedVT), Ops, WidenedVT, in lowerSBuffer()
6697 MF.getMachineMemOperand(MMO, 0, WidenedVT.getStoreSize())); in lowerSBuffer()
7869 EVT WidenedVT = VT; in getMemIntrinsicNode() local
7872 (WidenedVT == MVT::v3i32 || WidenedVT == MVT::v3f32)) { in getMemIntrinsicNode()
7873 WidenedVT = EVT::getVectorVT(*DAG.getContext(), in getMemIntrinsicNode()
7874 WidenedVT.getVectorElementType(), 4); in getMemIntrinsicNode()
7881 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode()
7885 if (WidenedVT != VT) { in getMemIntrinsicNode()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11812 EVT WidenedVT; in LowerDIV() local
11814 WidenedVT = MVT::nxv8i16; in LowerDIV()
11816 WidenedVT = MVT::nxv4i32; in LowerDIV()
11822 SDValue Op0Lo = DAG.getNode(UnpkLo, dl, WidenedVT, Op.getOperand(0)); in LowerDIV()
11823 SDValue Op1Lo = DAG.getNode(UnpkLo, dl, WidenedVT, Op.getOperand(1)); in LowerDIV()
11824 SDValue Op0Hi = DAG.getNode(UnpkHi, dl, WidenedVT, Op.getOperand(0)); in LowerDIV()
11825 SDValue Op1Hi = DAG.getNode(UnpkHi, dl, WidenedVT, Op.getOperand(1)); in LowerDIV()
21161 EVT WidenedVT = VT.widenIntegerVectorElementType(*DAG.getContext()); in LowerFixedLengthVectorIntDivideToSVE() local
21162 if (DAG.getTargetLoweringInfo().isTypeLegal(WidenedVT)) { in LowerFixedLengthVectorIntDivideToSVE()
21164 SDValue Op0 = DAG.getNode(ExtendOpcode, dl, WidenedVT, Op.getOperand(0)); in LowerFixedLengthVectorIntDivideToSVE()
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