| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/ |
| H A D | 2rf.ll | 24 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 45 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 63 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 81 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 102 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 123 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 141 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 159 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 180 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 201 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) [all …]
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| H A D | 3r-s.ll | 32 ; CHECK-DAG: st.b [[WD]] 60 ; CHECK-DAG: st.h [[WD]] 88 ; CHECK-DAG: st.w [[WD]] 116 ; CHECK-DAG: st.d [[WD]] 140 ; CHECK-DAG: st.b [[WD]] 164 ; CHECK-DAG: st.h [[WD]] 188 ; CHECK-DAG: st.w [[WD]] 212 ; CHECK-DAG: st.d [[WD]] 230 ; CHECK-DAG: st.b [[WD]] 248 ; CHECK-DAG: st.h [[WD]] [all …]
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| H A D | 2r.ll | 24 ; CHECK-DAG: st.b [[WD]], 0([[R2]]) 45 ; CHECK-DAG: st.h [[WD]], 0([[R2]]) 66 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 87 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 108 ; CHECK-DAG: st.b [[WD]], 0([[R2]]) 129 ; CHECK-DAG: st.h [[WD]], 0([[R2]]) 150 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 171 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 192 ; CHECK-DAG: st.b [[WD]], 0([[R2]]) 213 ; CHECK-DAG: st.h [[WD]], 0([[R2]]) [all …]
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| H A D | 2rf_int_float.ll | 24 ; CHECK-DAG: fclass.w [[WD:\$w[0-9]+]], [[WS]] 26 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 47 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 68 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 89 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 110 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 131 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 152 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 173 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 194 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) [all …]
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| H A D | 3r-a.ll | 34 ; CHECK-DAG: st.b [[WD]], 0([[R3]]) 59 ; CHECK-DAG: st.h [[WD]], 0([[R3]]) 84 ; CHECK-DAG: st.w [[WD]], 0([[R3]]) 109 ; CHECK-DAG: st.d [[WD]], 0([[R3]]) 134 ; CHECK-DAG: st.b [[WD]], 0([[R3]]) 159 ; CHECK-DAG: st.h [[WD]], 0([[R3]]) 184 ; CHECK-DAG: st.w [[WD]], 0([[R3]]) 209 ; CHECK-DAG: st.d [[WD]], 0([[R3]]) 234 ; CHECK-DAG: st.b [[WD]], 0([[R3]]) 259 ; CHECK-DAG: st.h [[WD]], 0([[R3]]) [all …]
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| H A D | 2rf_float_int.ll | 23 ; CHECK-DAG: ffint_s.w [[WD:\$w[0-9]+]], [[WS]] 25 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 44 ; CHECK-DAG: ffint_s.d [[WD:\$w[0-9]+]], [[WS]] 46 ; CHECK-DAG: st.d [[WD]], 0([[R2]]) 65 ; CHECK-DAG: ffint_u.w [[WD:\$w[0-9]+]], [[WS]] 67 ; CHECK-DAG: st.w [[WD]], 0([[R2]]) 86 ; CHECK-DAG: ffint_u.d [[WD:\$w[0-9]+]], [[WS]] 88 ; CHECK-DAG: st.d [[WD]], 0([[R2]])
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| H A D | 2r_vector_scalar.ll | 94 ; MIPS64-DAG: fill.d [[WD:\$w[0-9]+]], [[R1]] 97 ; MIPS64-DAG: st.d [[WD]], 0([[RD]])
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| /llvm-project-15.0.7/libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.nonmembers/ |
| H A D | minus.pass.cpp | 29 template <typename WD, typename Ds> 33 WD wd{5}; in testConstexpr() 35 assert(wd - offset == WD{2}); in testConstexpr() 36 assert(wd - WD{2} == offset); in testConstexpr() 40 assert(WD{0} - WD{1} == Ds{6}); in testConstexpr()
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| /llvm-project-15.0.7/libcxx/test/std/time/time.cal/time.cal.weekday/time.cal.weekday.members/ |
| H A D | iso_encoding.pass.cpp | 23 template <typename WD> 26 WD wd{5}; in testConstexpr()
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| H A D | c_encoding.pass.cpp | 22 template <typename WD> 25 WD wd{5}; in testConstexpr()
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| H A D | decrement.pass.cpp | 24 template <typename WD> 27 WD wd{1}; in testConstexpr()
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| H A D | increment.pass.cpp | 24 template <typename WD> 27 WD wd{5}; in testConstexpr()
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| /llvm-project-15.0.7/llvm/lib/MCA/ |
| H A D | InstrBuilder.cpp | 764 for (const WriteDescriptor &WD : D.Writes) { in createInstruction() local 765 RegID = WD.isImplicitWrite() ? WD.RegisterID in createInstruction() 766 : MCI.getOperand(WD.OpIndex).getReg(); in createInstruction() 768 if (WD.IsOptionalDef && !RegID) { in createInstruction() 776 WriteState(WD, RegID, in createInstruction() 780 NewIS->getDefs().emplace_back(WD, RegID, in createInstruction()
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| H A D | Instruction.cpp | 126 dbgs() << "{ OpIdx=" << WD->OpIndex << ", Lat=" << getLatency() << ", RegID " in dump()
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| /llvm-project-15.0.7/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 198 const WriteDescriptor *WD; variable 250 : WD(&Desc), CyclesLeft(UNKNOWN_CYCLES), RegisterID(RegID), PRFID(0), 259 unsigned getWriteResourceID() const { return WD->SClassOrWriteResourceID; } in getWriteResourceID() 263 unsigned getLatency() const { return WD->Latency; } in getLatency()
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| /llvm-project-15.0.7/clang-tools-extra/clangd/unittests/ |
| H A D | TUSchedulerTests.cpp | 101 llvm::StringRef Contents, WantDiagnostics WD, in updateWithCallback() argument 103 updateWithCallback(S, File, getInputs(File, std::string(Contents)), WD, in updateWithCallback() 108 WantDiagnostics WD, in updateWithCallback() argument 111 S.update(File, Inputs, WD); in updateWithCallback() 151 WantDiagnostics WD, in updateWithDiags() argument 160 S.update(File, std::move(Inputs), WD); in updateWithDiags() 164 WantDiagnostics WD, in updateWithDiags() argument 166 return updateWithDiags(S, File, getInputs(File, std::string(Contents)), WD, in updateWithDiags()
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| /llvm-project-15.0.7/clang-tools-extra/clangd/ |
| H A D | TUScheduler.h | 267 bool update(PathRef File, ParseInputs Inputs, WantDiagnostics WD);
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| H A D | ClangdServer.h | 208 WantDiagnostics WD = WantDiagnostics::Auto,
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| /llvm-project-15.0.7/llvm/lib/Support/ |
| H A D | VirtualFileSystem.cpp | 264 WD = {PWD, PWD}; in RealFileSystem() 266 WD = {PWD, RealPWD}; in RealFileSystem() 288 if (!WD) in adjustPath() 291 sys::fs::make_absolute(WD->Resolved, Storage); in adjustPath() 301 Optional<WorkingDirectory> WD; member in __anon2f7918780211::RealFileSystem 327 if (WD) in getCurrentWorkingDirectory() 328 return std::string(WD->Specified.str()); in getCurrentWorkingDirectory() 337 if (!WD) in setCurrentWorkingDirectory() 349 WD = {Absolute, Resolved}; in setCurrentWorkingDirectory() 369 if (WD) in printImpl()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | BitTracker.cpp | 747 uint16_t WD = getRegBitWidth(RD); in evaluate() local 749 assert(WD >= WS); in evaluate() 751 RegisterCell Res(WD); in evaluate() 753 Res.fill(WS, WD, BitValue::Zero); in evaluate()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.td | 90 def DR16 : MxRegClass<[i16], 16, (sequence "WD%u", 0, 7)>;
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| /llvm-project-15.0.7/clang/include/clang/AST/ |
| H A D | CommentHTMLNamedCharacterReferences.td | 13 // http://www.w3.org/TR/2011/WD-html5-20110113/named-character-references.html
|
| /llvm-project-15.0.7/lldb/test/API/functionalities/postmortem/FreeBSDKernel/ |
| H A D | vmcore-arm64-minidump.bz2 | 1minidump FreeBSD/arm64� �j�� |
| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 1079 NarrowIVDefUse(Instruction *ND, Instruction *NU, Instruction *WD, in NarrowIVDefUse() 1081 : NarrowDef(ND), NarrowUse(NU), WideDef(WD), in NarrowIVDefUse()
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| /llvm-project-15.0.7/libcxx/docs/Status/ |
| H A D | Cxx20Papers.csv | 48 "`P0941R2 <https://wg21.link/P0941R2>`__","CWG","Integrating feature-test macros into the C++ WD","…
|