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Searched refs:W10 (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Support/
H A DSHA256.cpp88 uint32_t W10 = InternalState.Buffer.L[10]; in hashBlock() local
96 F_EXPAND(H, A, B, C, D, E, F, G, W01, W15, W10, W02, 0x71374491); in hashBlock()
104 F_EXPAND(H, A, B, C, D, E, F, G, W09, W07, W02, W10, 0x12835B01); in hashBlock()
105 F_EXPAND(G, H, A, B, C, D, E, F, W10, W08, W03, W11, 0x243185BE); in hashBlock()
107 F_EXPAND(E, F, G, H, A, B, C, D, W12, W10, W05, W13, 0x72BE5D74); in hashBlock()
113 F_EXPAND(H, A, B, C, D, E, F, G, W01, W15, W10, W02, 0xEFBE4786); in hashBlock()
121 F_EXPAND(H, A, B, C, D, E, F, G, W09, W07, W02, W10, 0xA831C66D); in hashBlock()
122 F_EXPAND(G, H, A, B, C, D, E, F, W10, W08, W03, W11, 0xB00327C8); in hashBlock()
124 F_EXPAND(E, F, G, H, A, B, C, D, W12, W10, W05, W13, 0xC6E00BF3); in hashBlock()
130 F_EXPAND(H, A, B, C, D, E, F, G, W01, W15, W10, W02, 0x2E1B2138); in hashBlock()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.td43 W10 // Frame Ptr
H A DBPFRegisterInfo.cpp39 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer in getReservedRegs()
/llvm-project-15.0.7/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp114 BPF::W6, BPF::W7, BPF::W8, BPF::W9, BPF::W10, BPF::W11};
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h41 case AArch64::X10: return AArch64::W10; in getWRegFromXReg()
81 case AArch64::W10: return AArch64::X10; in getXRegFromWReg()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp86 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
H A DHexagonRegisterInfo.td242 def W10 : Rd<20, "v21:20", [V20, V21, VF10]>, DwarfRegNum<[119]>;
277 def VQ5 : Rd<20, "v23:20", [W10, W11]>, DwarfRegNum<[257]>;
/llvm-project-15.0.7/clang/test/Misc/
H A Ddiag-template-diffing.cpp1165 Wrapper<S<&global2, ptr2>> W10 = MakeWrapper<S<&global, ptr>>();
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp82 {codeview::RegisterId::ARM64_W10, AArch64::W10}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td78 def W10 : AArch64Reg<10, "w10">, DwarfRegNum<[10]>;
113 def X10 : AArch64Reg<10, "x10", [W10]>, DwarfRegAlias<W10>;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp629 Hexagon::W10, Hexagon::WR10, Hexagon::W11, Hexagon::WR11, Hexagon::W12, in DecodeHvxWRRegisterClass()