Searched refs:VecRegSize (Results 1 – 2 of 2) sorted by relevance
846 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in collectInstructions() local848 unsigned VF = VecRegSize / TySize; in collectInstructions()852 if (TySize > VecRegSize / 2 || in collectInstructions()886 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in collectInstructions() local888 unsigned VF = VecRegSize / TySize; in collectInstructions()892 if (TySize > VecRegSize / 2 || in collectInstructions()1017 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in vectorizeStoreChain() local1018 unsigned VF = VecRegSize / Sz; in vectorizeStoreChain()1177 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in vectorizeLoadChain() local1178 unsigned VF = VecRegSize / Sz; in vectorizeLoadChain()
11485 unsigned VecRegSize; in emitX86DeclareSimdFunction() member11522 Out << llvm::APSInt::getUnsigned(Data.VecRegSize / NumElts); in emitX86DeclareSimdFunction()11692 char ISA, unsigned VecRegSize, llvm::Function *Fn, SourceLocation SLoc) { in emitAArch64DeclareSimdFunction() argument