Searched refs:VecOpc (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 675 unsigned VecOpc) const;
683 unsigned VecOpc) const;
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| H A D | RISCVISelLowering.cpp | 6046 SDValue Op, SelectionDAG &DAG, unsigned MaskOpc, unsigned VecOpc) const { in lowerFixedLengthVectorLogicOpToRVV()
6052 return lowerToScalableOp(Op, DAG, VecOpc, /*HasMask*/ true); in lowerFixedLengthVectorLogicOpToRVV()
6459 unsigned VecOpc) const { in lowerLogicVPOp()
6462 return lowerVPOp(Op, DAG, VecOpc); in lowerLogicVPOp()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 47564 unsigned VecOpc = in combineBitOpWithMOVMSK() local
47567 DAG.getNode(VecOpc, DL, VecVT0, Vec0, DAG.getBitcast(VecVT0, Vec1)); in combineBitOpWithMOVMSK()
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