Searched refs:ValueBits (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/ |
| H A D | SimpleSValBuilder.cpp | 95 const unsigned ValueBits = Value.getSignificantBits(); in isNegationValuePreserving() local
96 if (ValueBits == ResultType.getBitWidth()) { in isNegationValuePreserving()
105 return ValueBits < ResultType.getBitWidth(); in isNegationValuePreserving()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4402 unsigned ValueBits = ValueVT.getSizeInBits(); in splitValueIntoRegisterParts() local
4404 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
4419 unsigned ValueBits = ValueVT.getSizeInBits(); in joinRegisterPartsIntoValue() local
4424 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 180 unsigned ValueBits = ValueVT.getSizeInBits(); in getCopyFromParts() local
186 EVT RoundVT = RoundBits == ValueBits ? in getCopyFromParts()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2752 unsigned ValueBits = ValueVT.getSizeInBits(); in splitValueIntoRegisterParts() local
2754 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
2768 unsigned ValueBits = ValueVT.getSizeInBits(); in joinRegisterPartsIntoValue() local
2773 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
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