Searched refs:ValLo (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.h | 88 uint32_t ValLo, uint32_t ValHi) const;
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| H A D | AMDGPUISelLowering.cpp | 3015 uint32_t ValLo, uint32_t ValHi) const { in splitBinaryBitConstantOpImpl() argument 3020 SDValue LoRHS = DAG.getConstant(ValLo, SL, MVT::i32); in splitBinaryBitConstantOpImpl()
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| H A D | SIISelLowering.cpp | 9471 uint32_t ValLo = Lo_32(Val); in splitBinaryBitConstantOp() local 9475 if ((bitOpWithConstantIsReducible(Opc, ValLo) || in splitBinaryBitConstantOp() 9481 return splitBinaryBitConstantOpImpl(DCI, SL, Opc, LHS, ValLo, ValHi); in splitBinaryBitConstantOp()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 3698 SDValue ValLo = Node->getOperand(2); in Select() local 3703 SDValue Ops[] = {ValLo, ValHi, MemAddr, Chain}; in Select()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 10779 SDValue ValLo = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i128, LoadedVal); in LowerATOMIC_LOAD_STORE() local 10785 DAG.getNode(ISD::OR, dl, {MVT::i128, MVT::Other}, {ValLo, ValHi}); in LowerATOMIC_LOAD_STORE() 10797 SDValue ValLo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i64, Val); in LowerATOMIC_LOAD_STORE() local 10801 Ops.push_back(ValLo); in LowerATOMIC_LOAD_STORE()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4530 SDValue ValLo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Val, Zero); in lowerINSERT_VECTOR_ELT() local 4547 DAG.getUNDEF(I32ContainerVT), ValInVec, ValLo, in lowerINSERT_VECTOR_ELT()
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