Searched refs:VTBL1 (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ARM/ |
| H A D | tbl1.ll | 27 ; CHECK-NEXT: [[VTBL1:%.*]] = call <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8> [[VEC:%.*]], <8 x i8> … 28 ; CHECK-NEXT: ret <8 x i8> [[VTBL1]]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 210 VTBL1, // 1-register shuffle with mask enumerator
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| H A D | ARMISelLowering.cpp | 1768 MAKE_CASE(ARMISD::VTBL1) in getTargetNodeName() 4177 return DAG.getNode(ARMISD::VTBL1, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN() 8421 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
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| H A D | ARMInstrNEON.td | 533 def NEONvtbl1 : SDNode<"ARMISD::VTBL1", SDTARMVTBL1>; 7161 def VTBL1
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | arm_neon.td | 576 def VTBL1 : WInst<"vtbl1", "..p", "UccPc">;
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