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Searched refs:VSX (Results 1 – 25 of 70) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dfma-negate.ll12 ; VSX-NEXT: blr
18 ; NO-VSX-NEXT: blr
31 ; VSX-NEXT: blr
37 ; NO-VSX-NEXT: blr
51 ; VSX-NEXT: blr
70 ; VSX-NEXT: blr
89 ; VSX-NEXT: blr
109 ; VSX-NEXT: blr
128 ; VSX-NEXT: blr
152 ; VSX-NEXT: blr
[all …]
H A Dpr45628.ll16 ; P9-VSX-LABEL: rotl_64:
19 ; P9-VSX-NEXT: blr
29 ; P8-VSX-NEXT: blr
46 ; P9-VSX-NEXT: blr
56 ; P8-VSX-NEXT: blr
73 ; P9-VSX-NEXT: blr
83 ; P8-VSX-NEXT: blr
100 ; P9-VSX-NEXT: blr
110 ; P8-VSX-NEXT: blr
127 ; P9-VSX-NEXT: blr
[all …]
H A Dfma-assoc.ll22 ; CHECK-VSX: # %bb.0:
26 ; CHECK-VSX-NEXT: blr
48 ; CHECK-VSX-NEXT: blr
70 ; CHECK-VSX-NEXT: blr
92 ; CHECK-VSX-NEXT: blr
112 ; CHECK-VSX-NEXT: blr
134 ; CHECK-VSX-NEXT: blr
155 ; CHECK-VSX-NEXT: blr
177 ; CHECK-VSX-NEXT: blr
200 ; CHECK-VSX-NEXT: blr
[all …]
H A Dfloat-to-int.ll22 ; CHECK-VSX: @foo
25 ; CHECK-VSX: ld 3,
26 ; CHECK-VSX: blr
45 ; CHECK-VSX: @foo2
49 ; CHECK-VSX: blr
72 ; CHECK-VSX: blr
95 ; CHECK-VSX: blr
118 ; CHECK-VSX: blr
135 ; CHECK-VSX: blr
152 ; CHECK-VSX: blr
[all …]
H A Dunaligned.ll13 ; CHECK-VSX-LABEL: foo1:
17 ; CHECK-VSX-NEXT: blr
33 ; CHECK-VSX-LABEL: foo2:
37 ; CHECK-VSX-NEXT: blr
53 ; CHECK-VSX-LABEL: foo3:
57 ; CHECK-VSX-NEXT: blr
73 ; CHECK-VSX-LABEL: foo4:
77 ; CHECK-VSX-NEXT: blr
93 ; CHECK-VSX-LABEL: foo5:
97 ; CHECK-VSX-NEXT: blr
[all …]
H A Dfsel.ll23 ; CHECK-FM-VSX: blr
44 ; CHECK-FM-VSX: blr
67 ; CHECK-FM-VSX: blr
85 ; CHECK-FM-VSX: @min1
88 ; CHECK-FM-VSX: blr
106 ; CHECK-FM-VSX: @max1
109 ; CHECK-FM-VSX: blr
127 ; CHECK-FM-VSX: @cmp1
130 ; CHECK-FM-VSX: blr
151 ; CHECK-FM-VSX: blr
[all …]
H A Di64-to-float.ll21 ; CHECK-VSX: @foo
22 ; CHECK-VSX: std 3,
25 ; CHECK-VSX: blr
45 ; CHECK-VSX: @goo
46 ; CHECK-VSX: std 3,
49 ; CHECK-VSX: blr
69 ; CHECK-VSX: @foou
70 ; CHECK-VSX: std 3,
73 ; CHECK-VSX: blr
93 ; CHECK-VSX: @goou
[all …]
H A Dvec_add_sub_doubleword.ll17 ; VSX-LABEL: increment_by_one:
18 ; VSX: # %bb.0:
23 ; VSX-NEXT: blr
38 ; VSX: # %bb.0:
39 ; VSX-NEXT: mtfprd 0, 5
42 ; VSX-NEXT: blr
82 ; VSX: # %bb.0:
85 ; VSX-NEXT: blr
100 ; VSX: # %bb.0:
101 ; VSX-NEXT: mtfprd 0, 5
[all …]
H A Dvec_select.ll8 ; CHECK-VSX-LABEL: test1:
12 ; CHECK-VSX-NEXT: blr
26 ; CHECK-VSX-LABEL: test2:
30 ; CHECK-VSX-NEXT: blr
51 ; CHECK-VSX-LABEL: test3:
55 ; CHECK-VSX-NEXT: blr
69 ; CHECK-VSX-LABEL: test4:
73 ; CHECK-VSX-NEXT: blr
91 ; CHECK-VSX-NEXT: blr
109 ; CHECK-VSX-NEXT: blr
[all …]
H A Dvec_mul.ll20 ; CHECK-VSX: vmsumuhm
21 ; CHECK-VSX-NOT: mullw
23 ; CHECK-LE-VSX: vmsumuhm
24 ; CHECK-LE-VSX-NOT: mullw
39 ; CHECK-VSX: vmladduhm
40 ; CHECK-VSX-NOT: mullw
61 ; CHECK-VSX: vmuloub
62 ; CHECK-VSX: vmuleub
63 ; CHECK-VSX-NOT: mullw
88 ; CHECK-VSX: xvmulsp
[all …]
H A Di32-to-float.ll34 ; CHECK-VSX: @foo
35 ; CHECK-VSX: stw 3,
38 ; CHECK-VSX: blr
65 ; CHECK-VSX: @goo
66 ; CHECK-VSX: stw 3,
69 ; CHECK-VSX: blr
83 ; CHECK-VSX: @foou
84 ; CHECK-VSX: stw 3,
87 ; CHECK-VSX: blr
101 ; CHECK-VSX: @goou
[all …]
H A Dfma-ext.ll14 ; CHECK-VSX: xsmaddmdp
15 ; CHECK-VSX-NEXT: blr
28 ; CHECK-VSX: xsmaddmdp
29 ; CHECK-VSX-NEXT: blr
42 ; CHECK-VSX: xsmsubmdp
43 ; CHECK-VSX-NEXT: blr
57 ; CHECK-VSX: xsnegdp
59 ; CHECK-VSX-NEXT: blr
74 ; CHECK-VSX-NEXT: blr
91 ; CHECK-VSX-NEXT: blr
[all …]
H A Dcopysignl.ll15 ; CHECK-VSX-LABEL: @foo_d_ll
17 ; CHECK-VSX: blr
31 ; CHECK-VSX-LABEL: @foo_dl
33 ; CHECK-VSX: blr
47 ; CHECK-VSX-LABEL: @foo_ll
48 ; CHECK-VSX: bl copysignl
49 ; CHECK-VSX: blr
63 ; CHECK-VSX: bl copysignl
64 ; CHECK-VSX: blr
78 ; CHECK-VSX: bl copysignl
[all …]
H A Daix-p8vector-liveins.ll3 ; RUN: FileCheck --check-prefixes=POWR8,VSX %s
9 ; RUN: < %s | FileCheck %s --check-prefixes=VSX,NOP8V
72 ; VSX-LABEL: vsfr
73 ; VSX: registers:
74 ; VSX: - { id: 0, class: vsfrc, preferred-register: '' }
83 ; VSX: %4:vsfrc = COPY $f5
84 ; VSX: %3:vsfrc = COPY $f4
85 ; VSX: %2:vsfrc = COPY $f3
86 ; VSX: %1:vsfrc = COPY $f2
87 ; VSX: %0:vsfrc = COPY $f1
[all …]
H A Drounding-ops.ll12 ; CHECK-VSX-LABEL: test1:
13 ; CHECK-VSX: xsrdpim 1, 1
24 ; CHECK-VSX-LABEL: test2:
25 ; CHECK-VSX: xsrdpim 1, 1
36 ; CHECK-VSX-LABEL: test3:
37 ; CHECK-VSX: xsrdpi 1, 1
48 ; CHECK-VSX-LABEL: test4:
49 ; CHECK-VSX: xsrdpi 1, 1
60 ; CHECK-VSX-LABEL: test5:
61 ; CHECK-VSX: xsrdpip 1, 1
[all …]
H A Dfcpsgn.ll14 ; CHECK-VSX-LABEL: @foo_dd
16 ; CHECK-VSX: blr
29 ; CHECK-VSX-LABEL: @foo_ss
30 ; CHECK-VSX: fcpsgn 1, 2, 1
31 ; CHECK-VSX: blr
45 ; CHECK-VSX-LABEL: @foo_sd
46 ; CHECK-VSX: fcpsgn 1, 2, 1
47 ; CHECK-VSX: blr
59 ; CHECK-VSX-LABEL: @foo_ds
60 ; CHECK-VSX: fcpsgn 1, 2, 1
[all …]
H A Dvec_add_sub_quadword.ll27 ; VSX: # %bb.0:
32 ; VSX-NEXT: blr
47 ; VSX: # %bb.0:
48 ; VSX-NEXT: mtfprd 0, 6
49 ; VSX-NEXT: mtfprd 1, 5
52 ; VSX-NEXT: blr
78 ; VSX: # %bb.0:
83 ; VSX-NEXT: blr
98 ; VSX: # %bb.0:
99 ; VSX-NEXT: mtfprd 0, 6
[all …]
H A Dfma.ll20 ; CHECK-VSX: xsmaddmdp
21 ; CHECK-VSX-NEXT: blr
33 ; CHECK-VSX: xsmaddmdp
34 ; CHECK-VSX-NEXT: blr
46 ; CHECK-VSX: xsmsubmdp
47 ; CHECK-VSX-NEXT: blr
61 ; CHECK-VSX: xsmaddadp
76 ; CHECK-VSX-NEXT: blr
90 ; CHECK-VSX-NEXT: blr
103 ; CHECK-VSX: xsnegdp
[all …]
H A Dvec-abi-align.ll21 ; CHECK-VSX-LABEL: @test1
22 ; CHECK-VSX: stxvw4x 34,
23 ; CHECK-VSX: blr
44 ; CHECK-VSX-LABEL: @test2
45 ; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1)
46 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
49 ; CHECK-VSX: blr
70 ; CHECK-VSX-LABEL: @test3
71 ; CHECK-VSX-DAG: ld {{[0-9]+}}, 128(1)
72 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
[all …]
H A Dppc-passname.ll27 ; STOP-BEFORE-VSX-COPY-NOT: -ppc-vsx-copy
29 ; STOP-BEFORE-VSX-COPY-NOT: PowerPC VSX Copy Legalization
32 ; STOP-AFTER-VSX-COPY: -ppc-vsx-copy
34 ; STOP-AFTER-VSX-COPY: PowerPC VSX Copy Legalization
53 ; STOP-BEFORE-VSX-FMA-MUTATE-NOT: PowerPC VSX FMA Mutation
56 ; STOP-AFTER-VSX-FMA-MUTATE: -ppc-vsx-fma-mutate
58 ; STOP-AFTER-VSX-FMA-MUTATE: PowerPC VSX FMA Mutation
63 ; STOP-BEFORE-VSX-SWAPS-NOT: -ppc-vsx-swaps
65 ; STOP-BEFORE-VSX-SWAPS-NOT: PowerPC VSX Swap Removal
68 ; STOP-AFTER-VSX-SWAPS: -ppc-vsx-swaps
[all …]
H A Dppc64-align-long-double.ll34 ; CHECK-VSX-LABEL: test:
35 ; CHECK-VSX: # %bb.0: # %entry
36 ; CHECK-VSX-NEXT: std 5, -16(1)
37 ; CHECK-VSX-NEXT: std 6, -8(1)
38 ; CHECK-VSX-NEXT: lfd 1, -16(1)
39 ; CHECK-VSX-NEXT: lfd 2, -8(1)
40 ; CHECK-VSX-NEXT: std 6, 72(1)
41 ; CHECK-VSX-NEXT: std 5, 64(1)
42 ; CHECK-VSX-NEXT: std 3, 48(1)
43 ; CHECK-VSX-NEXT: std 4, 56(1)
[all …]
H A Dmcm-4.ll32 ; MEDIUM-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
33 ; MEDIUM-VSX: .quad 0x3f4fd4920b498cf0
34 ; MEDIUM-VSX-LABEL: test_double_const:
35 ; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
36 ; MEDIUM-VSX: lfd {{[0-9]+}}, 0({{[0-9]+}})
45 ; LARGE-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
46 ; LARGE-VSX: .quad 0x3f4fd4920b498cf0
47 ; LARGE-VSX-LABEL: test_double_const:
48 ; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
49 ; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
[all …]
H A Dbuiltins-ppc-xlcompat-stfiw.ll5 ; RUN: -mcpu=pwr9 -mattr -vsx < %s | FileCheck %s --check-prefix=CHECK-NO-VSX
9 ; RUN: -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-NO-VSX
22 ; CHECK-NO-VSX-LABEL: test_stfiw:
23 ; CHECK-NO-VSX: # %bb.0: # %entry
24 ; CHECK-NO-VSX-NEXT: stfiwx 1, 0, 3
25 ; CHECK-NO-VSX-NEXT: blr
43 ; CHECK-NO-VSX-LABEL: test_xl_stfiw:
44 ; CHECK-NO-VSX: # %bb.0: # %entry
45 ; CHECK-NO-VSX-NEXT: stfiwx 1, 0, 3
46 ; CHECK-NO-VSX-NEXT: blr
H A Dfast-isel-cmp-imm.ll16 ; VSX: addis
17 ; VSX: lfs
18 ; VSX: fcmpu
39 ; VSX: addis
40 ; VSX: lfs
41 ; VSX: fcmpu
62 ; VSX: addis
63 ; VSX: lfs
86 ; VSX: lfd
109 ; VSX: lfd
[all …]
H A Dmcm-12.ll4 ; RUN: -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
25 ; CHECK-VSX: [[VAR:[a-z0-9A-Z_.]+]]:
26 ; CHECK-VSX: .quad 0x3f4fd4920b498cf0
27 ; CHECK-VSX-LABEL: test_double_const:
28 ; CHECK-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
29 ; CHECK-VSX: lfd {{[0-9]+}}, [[VAR]]@toc@l({{[0-9]+}})

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