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Searched refs:VSLIDE1UP_VL (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h181 VSLIDE1UP_VL, enumerator
H A DRISCVISelLowering.cpp4543 ValInVec = DAG.getNode(RISCVISD::VSLIDE1UP_VL, DL, I32ContainerVT, in lowerINSERT_VECTOR_ELT()
4546 ValInVec = DAG.getNode(RISCVISD::VSLIDE1UP_VL, DL, I32ContainerVT, in lowerINSERT_VECTOR_ELT()
4794 Vec = DAG.getNode(RISCVISD::VSLIDE1UP_VL, DL, I32VT, Passthru, Vec, in lowerVectorIntrinsicScalars()
4796 Vec = DAG.getNode(RISCVISD::VSLIDE1UP_VL, DL, I32VT, Passthru, Vec, in lowerVectorIntrinsicScalars()
11669 NODE_NAME_CASE(VSLIDE1UP_VL) in getTargetNodeName()
H A DRISCVInstrInfoVVLPatterns.td1679 def riscv_slide1up_vl : SDNode<"RISCVISD::VSLIDE1UP_VL", SDTRVVSlide1, []>;