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Searched refs:VSHF (Results 1 – 7 of 7) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/VE/VELIntrinsics/
H A Dvshf.ll6 ;;; We test VSHF*vvrl, VSHF*vvrl_v, VSHF*vvil, and VSHF*vvil_v instructions.
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMSA.txt32 and pck* instructions, this is matched from MipsISD::VSHF instead of
45 it lowers directly to MipsISD::VSHF instead of using common IR.
H A DMipsISelLowering.h228 VSHF, // Generic shuffle enumerator
H A DMipsSEISelLowering.cpp2184 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2191 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2270 return DAG.getNode(MipsISD::VSHF, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
2970 return DAG.getNode(MipsISD::VSHF, DL, ResTy, MaskVec, Op1, Op0); in lowerVECTOR_SHUFFLE_VSHF()
H A DMipsISelLowering.cpp274 case MipsISD::VSHF: return "MipsISD::VSHF"; in getTargetNodeName()
H A DMipsMSAInstrInfo.td39 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrVec.td731 // special RV multiclass with 3 arguments for VSHF.
732 // e.g. VSHF
1444 // Section 8.16.2 - VSHF (Vector Shuffle)
1445 defm VSHF : RVSHFm<"vshf", 0xbc, V64>;