| /llvm-project-15.0.7/llvm/test/MC/AMDGPU/ |
| H A D | gfx11_asm_dpp.s | 91 ; VOP3P
212 ; VOP3P
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| /llvm-project-15.0.7/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX904.rst | 36 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX900.rst | 36 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX1011.rst | 66 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX906.rst | 59 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX908.rst | 88 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX90a.rst | 1579 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX9.rst | 1659 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX10.rst | 1926 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX1030.rst | 1832 VOP3P section in Instructions
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| H A D | AMDGPUAsmGFX940.rst | 1560 VOP3P section in Instructions
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrFormats.td | 32 field bit VOP3P = 0;
114 // This bit indicates that this is a packed VOP3P instruction
167 let TSFlags{12} = VOP3P;
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| H A D | VOP3PInstructions.td | 10 // VOP3P Classes
67 let VOP3P = 1;
73 // Non-packed instructions that use the VOP3P encoding.
74 // VOP3 neg/abs and VOP3P opsel/opsel_hi modifiers are allowed.
83 let VOP3P = 1;
956 let VOP3P = 1;
1190 let AssemblerPredicate = isGFX10Only, DecoderNamespace = "GFX10", VOP3P = 1 in {
1195 } // End AssemblerPredicate = isGFX10Only, DecoderNamespace = "GFX10", VOP3P = 1
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| H A D | VINTERPInstructions.td | 24 let Inst{31-26} = 0x33; // VOP3P encoding
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| H A D | SIDefines.h | 46 VOP3P = 1 << 12, enumerator
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| H A D | SIInstrInfo.h | 643 return MI.getDesc().TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
647 return get(Opcode).TSFlags & SIInstrFlags::VOP3P; in isVOP3P()
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| H A D | VOPInstructions.td | 150 let VOP3P = 1;
909 let VOP3P = 1;
984 let VOP3P = 1;
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| H A D | AMDGPU.td | 379 "Has VOP3P packed instructions"
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| H A D | SIInstructions.td | 1563 // VOP3P instructions, so it is turned into the bit op.
2561 // FIXME: Should have VOP3P subtarget predicate
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| H A D | SIInstrInfo.td | 2099 // Returns the assembly string for the inputs and outputs of a VOP3P
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUModifierSyntax.rst | 1755 VOP3P Modifiers
1758 This section describes modifiers of *regular* VOP3P instructions.
1914 VOP3P MAD_MIX/FMA_MIX Modifiers
1919 in a manner different from *regular* VOP3P instructions.
2005 VOP3P MFMA Modifiers
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | SIMCCodeEmitter.cpp | 328 if ((Desc.TSFlags & SIInstrFlags::VOP3P) || in encodeInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 451 if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3P) in getInstruction()
794 if (MCII->get(Opc).TSFlags & SIInstrFlags::VOP3P) { in convertDPP8Inst()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3428 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
4012 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
4189 !(TSFlags & SIInstrFlags::VOP3P)) { in validateOpSel()
4234 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P)) && in validateVOPLiteral()
8818 if (Desc.TSFlags & SIInstrFlags::VOP3P) in cvtVOP3DPP()
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