| /llvm-project-15.0.7/llvm/test/MC/AMDGPU/ |
| H A D | gfx11_asm_dpp.s | 51 ; VOP3
183 ; VOP3
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | VOPInstructions.td | 79 let VOP3 = 1;
81 let AsmVariantName = AMDGPUAsmVariants.VOP3;
127 let VOP3 = 1;
164 let VOP3 = 1;
805 let VOP3 = 1;
880 let VOP3 = 1;
966 let VOP3 = 1;
1068 // VOP3 Classes
1272 // VOP3 DPP
1318 // VOP3 GFX11
[all …]
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| H A D | SIInstrFormats.td | 31 field bit VOP3 = 0;
87 // This bit indicates that this is a VOP3 opcode which supports op_sel
166 let TSFlags{10} = VOP3;
237 let hasExtraSrcRegAllocReq = !or(VOP1, VOP2, VOP3, VOPC, SDWA, VALU);
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| H A D | SIDefines.h | 45 VOP3 = 1 << 10, enumerator
267 VOP3 = 1, enumerator
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| H A D | SIInstrInfo.td | 1588 3))); // VOP3
1703 // Src2 of VOP3 DPP instructions cannot be a literal
1833 // VOP3 with modifiers
1847 // VOP3 with modifiers except src2
1860 // VOP3 without modifiers
1930 /* NumSrcArgs == 3, VOP3 */,
2297 0, // NumSrcArgs == 3 - No SDWA for VOP3
2313 0, // NumSrcArgs == 3 - No DPP for VOP3
2750 let ColFields = ["Size", "VOP3"];
2759 let ColFields = ["Size", "VOP3"];
[all …]
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| H A D | VINTERPInstructions.td | 45 // VOP3 VINTERP
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| H A D | AMDGPU.td | 682 "Can use one literal in VOP3"
1307 string VOP3 = "VOP3";
1328 let Name = AMDGPUAsmVariants.VOP3;
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| H A D | SIInstrInfo.h | 440 return MI.getDesc().TSFlags & SIInstrFlags::VOP3; in isVOP3()
444 return get(Opcode).TSFlags & SIInstrFlags::VOP3; in isVOP3()
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| H A D | VOP2Instructions.td | 1317 // VOP3 only.
1641 // VOP3 only.
1652 // VOP3 carry-out.
2053 // are VOP2 on SI and VOP3 on VI.
2061 let AsmVariantName = AMDGPUAsmVariants.VOP3;
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| H A D | VOPCInstructions.td | 1191 // Encoding used for VOPC instructions encoded as VOP3 differs from
1284 // Encoding used for VOPC instructions encoded as VOP3 differs from
1678 // Encoding used for VOPC instructions encoded as VOP3 differs from
1795 // Encoding used for VOPC instructions encoded as VOP3 differs from
2031 // Encoding used for VOPC instructions encoded as VOP3
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| H A D | VOP3Instructions.td | 52 // VOP3 INTERP
117 // VOP3 Instructions
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 145 they may also be encoded in *VOP3*, *DPP* and *SDWA* formats.
154 *VOP3* (64-bit) encoding _e64
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| H A D | AMDGPUInstructionNotation.rst | 96 :ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
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| H A D | AMDGPUModifierSyntax.rst | 1550 VOP3 Modifiers
1680 VOP3 Operand Modifiers
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | verify-constant-bus-violations.mir | 22 # GFX10PLUS-ERR: *** Bad machine code: VOP2/VOP3 instruction uses more than one literal ***
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| H A D | add.ll | 166 ; Make sure the VOP3 form of add is initially selected. Otherwise pair
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| H A D | sub.ll | 224 ; Make sure the VOP3 form of sub is initially selected. Otherwise pair
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| H A D | frame-index-elimination.ll | 189 ; Added offset can't be used with VOP3 add
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| H A D | commute-compares.ll | 697 ; SIShrinkInstructions, this was using the VOP3 compare.
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| /llvm-project-15.0.7/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX906.rst | 49 VOP3 section in Instructions
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| H A D | AMDGPUAsmGFX908.rst | 78 VOP3 section in Instructions
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | SIMCCodeEmitter.cpp | 313 return (Desc.TSFlags & SIInstrFlags::VOP3) && in isVCMPX64()
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| H A D | AMDGPUInstPrinter.cpp | 370 if (Flags & SIInstrFlags::VOP3 && Flags & SIInstrFlags::DPP) in printVOPDst()
372 else if (Flags & SIInstrFlags::VOP3) { in printVOPDst()
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | literalv216_gfx10.txt | 147 # FIXME: v_pk_fmac_f16 cannot be promoted to VOP3 so '_e32' suffix is not valid
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 3228 if ((getForcedEncodingSize() == 32 && (TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3229 (getForcedEncodingSize() == 64 && !(TSFlags & SIInstrFlags::VOP3)) || in checkTargetMatchPredicate()
3234 if ((TSFlags & SIInstrFlags::VOP3) && in checkTargetMatchPredicate()
3255 AMDGPUAsmVariants::DEFAULT, AMDGPUAsmVariants::VOP3, in getAllVariants()
3275 static const unsigned Variants[] = {AMDGPUAsmVariants::VOP3}; in getMatchedVariants()
3428 SIInstrFlags::VOP3 | SIInstrFlags::VOP3P | in validateConstantBusLimitations()
4012 const auto Enc = VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA; in validateLdsDirect()
4188 if ((TSFlags & SIInstrFlags::IsDOT) && (TSFlags & SIInstrFlags::VOP3) && in validateOpSel()
4234 if (!(Desc.TSFlags & (SIInstrFlags::VOP3 | SIInstrFlags::VOP3P)) && in validateVOPLiteral()
8820 else if (Desc.TSFlags & SIInstrFlags::VOP3) in cvtVOP3DPP()
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