Searched refs:VMLALVs (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 250 VMLALVs, // Same as VMLAV but with i64, returning the low and enumerator
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| H A D | ARMISelLowering.cpp | 1795 MAKE_CASE(ARMISD::VMLALVs) in getTargetNodeName()
13554 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N0, N1)) in PerformADDVecReduce()
13558 if (SDValue M = MakeVecReduce(ARMISD::VMLALVs, ARMISD::VMLALVAs, N1, N0)) in PerformADDVecReduce()
16983 assert((Opcode == ARMISD::VMLALVs || Opcode == ARMISD::VMLALVu) && in PerformVECREDUCE_ADDCombine()
17015 return Create64bitNode(ARMISD::VMLALVs, {A, B}); in PerformVECREDUCE_ADDCombine()
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| H A D | ARMInstrMVE.td | 1149 def ARMVMLALVs : SDNode<"ARMISD::VMLALVs", SDTVecReduce2L>;
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