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Searched refs:VLD2DUP (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.h326 VLD2DUP, enumerator
H A DARMInstrNEON.td1467 // VLD2DUP : Vector Load (single 2-element structure to all lanes)
1468 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode>
1477 def VLD2DUPd8 : VLD2DUP<{0,0,0,?}, "8", VecListDPairAllLanes,
1479 def VLD2DUPd16 : VLD2DUP<{0,1,0,?}, "16", VecListDPairAllLanes,
1481 def VLD2DUPd32 : VLD2DUP<{1,0,0,?}, "32", VecListDPairAllLanes,
1487 def VLD2DUPd8x2 : VLD2DUP<{0,0,1,?}, "8", VecListDPairSpacedAllLanes,
1489 def VLD2DUPd16x2 : VLD2DUP<{0,1,1,?}, "16", VecListDPairSpacedAllLanes,
1491 def VLD2DUPd32x2 : VLD2DUP<{1,0,1,?}, "32", VecListDPairSpacedAllLanes,
H A DARMISelLowering.cpp1837 MAKE_CASE(ARMISD::VLD2DUP) in getTargetNodeName()
15725 case ARMISD::VLD2DUP: in TryCombineBaseUpdate()
16187 NewOpc = ARMISD::VLD2DUP; in CombineVLDDUP()
18655 case ARMISD::VLD2DUP: in PerformDAGCombine()
H A DARMISelDAGToDAG.cpp4352 case ARMISD::VLD2DUP: { in Select()