Home
last modified time | relevance | path

Searched refs:VFNMSUB_VL (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h248 VFNMSUB_VL, enumerator
H A DRISCVISelLowering.cpp8632 case RISCVISD::VFMADD_VL: Opcode = RISCVISD::VFNMSUB_VL; break; in negateFMAOpcode()
8633 case RISCVISD::VFNMSUB_VL: Opcode = RISCVISD::VFMADD_VL; break; in negateFMAOpcode()
8647 case RISCVISD::VFNMADD_VL: Opcode = RISCVISD::VFNMSUB_VL; break; in negateFMAOpcode()
8648 case RISCVISD::VFNMSUB_VL: Opcode = RISCVISD::VFNMADD_VL; break; in negateFMAOpcode()
9255 case RISCVISD::VFNMSUB_VL: { in PerformDAGCombine()
11713 NODE_NAME_CASE(VFNMSUB_VL) in getTargetNodeName()
H A DRISCVInstrInfoVVLPatterns.td110 def riscv_vfnmsub_vl : SDNode<"RISCVISD::VFNMSUB_VL", SDT_RISCVVecFMA_VL, [SDNPCommutative]>;