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Searched refs:VFMSUB_VL (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h247 VFMSUB_VL, enumerator
H A DRISCVISelLowering.cpp8634 case RISCVISD::VFNMADD_VL: Opcode = RISCVISD::VFMSUB_VL; break; in negateFMAOpcode()
8635 case RISCVISD::VFMSUB_VL: Opcode = RISCVISD::VFNMADD_VL; break; in negateFMAOpcode()
8645 case RISCVISD::VFMADD_VL: Opcode = RISCVISD::VFMSUB_VL; break; in negateFMAOpcode()
8646 case RISCVISD::VFMSUB_VL: Opcode = RISCVISD::VFMADD_VL; break; in negateFMAOpcode()
9254 case RISCVISD::VFMSUB_VL: in PerformDAGCombine()
11712 NODE_NAME_CASE(VFMSUB_VL) in getTargetNodeName()
H A DRISCVInstrInfoVVLPatterns.td109 def riscv_vfmsub_vl : SDNode<"RISCVISD::VFMSUB_VL", SDT_RISCVVecFMA_VL, [SDNPCommutative]>;