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/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dmangle-local-class-names.cpp30 SSSS VAR2(IVAR2); in FUNC() local
54 SSSS VAR2(IVAR2); in GORF() local
74 SSSS VAR2(x); in OmittingCode() local
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dmcm-4.ll41 ; LARGE: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
42 ; LARGE: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
48 ; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
49 ; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
62 ; LARGE-P9: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
63 ; LARGE-P9: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
H A Dpr39815.ll26 ; CHECK-DAG: addis [[REG8:[0-9]+]], [[REG2]], [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
27 ; CHECK-DAG: stb [[REG9]], [[VAR2]]@toc@l([[REG8]])
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dtosa-decompose-conv2d.mlir12 // CHECK: %[[VAR2:.*]] = "tosa.fully_connected"(%[[VAR0]], %[[VAR1]], %arg2)
14 // CHECK: %[[VAR3:.*]] = "tosa.reshape"(%[[VAR2]]) {new_shape = [4, 10, 10, 3]}
30 // CHECK: %[[VAR2:.*]] = "tosa.fully_connected"(%[[VAR0]], %[[VAR1]], %arg2)
33 // CHECK: %[[VAR3:.*]] = "tosa.reshape"(%[[VAR2]]) {new_shape = [4, 10, 10, 3]}
H A Dtosa-decompose-depthwise.mlir12 // CHECK: %[[VAR2:.*]] = "tosa.mul"(%[[VAR0]], %[[VAR1]])
14 // CHECK: %[[VAR3:.*]] = "tosa.reshape"(%[[VAR2]]) {new_shape = [4, 10, 10, 6]}
/llvm-project-15.0.7/llvm/test/Transforms/LCSSA/
H A Drewrite-existing-dbg-values.ll62 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata [[VAR2:![0-9]+]], metadata !DIE…
69 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[PN1]], metadata [[VAR2]], metadata !DIExpres…
74 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 [[PN2]], metadata [[VAR2]], metadata !DIExpres…
78 ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %add, metadata [[VAR2]], metadata !DIExpressio…
111 ; CHECK: [[VAR2]] = !DILocalVariable(name: "sum2",
/llvm-project-15.0.7/mlir/test/Conversion/SCFToSPIRV/
H A Dfor.mlir58 // CHECK: %[[VAR2:.*]] = spv.Variable : !spv.ptr<f32, Function>
68 // CHECK-DAG: spv.Store "Function" %[[VAR2]], %[[UPDATED]] : f32
78 // CHECK-DAG: %[[OUT2:.*]] = spv.Load "Function" %[[VAR2]] : f32
H A Dif.mlir85 // CHECK: %[[VAR2:.*]] = spv.Variable : !spv.ptr<f32, Function>
92 // CHECK-DAG: spv.Store "Function" %[[VAR2]], %[[RET2TRUE]] : f32
98 // CHECK-DAG: spv.Store "Function" %[[VAR2]], %[[RET2FALSE]] : f32
104 // CHECK-DAG: %[[OUT2:.*]] = spv.Load "Function" %[[VAR2]] : f32
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dstore-shuffle-bug.ll22 ; CHECK: [[VAR2:%[a-zA-Z0-9.]+]] = load <4 x i32>
23 ; CHECK: [[VAR3:%[a-zA-Z0-9]+]] = add nsw <4 x i32> [[VAR2]], [[VAR1]]
/llvm-project-15.0.7/llvm/test/DebugInfo/X86/
H A Dsroasplit-dbg-declare.ll53 ; CHECK-NEXT: %[[VAR2:.*]] = alloca [8 x i32]
55 ; CHECK-NEXT: call void @llvm.dbg.declare(metadata [8 x i32]* %[[VAR2]]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dextload-combine.ll40 ; CHECK: [[VAR2:r[0-9]+]] = memub(##
41 ; CHECK: combine(#0,[[VAR2]])
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/MIRDebugify/
H A Dlocations-and-values.mir26 ; VALUE: [[VAR2:![0-9]+]] = !DILocalVariable(name: "2"
44 ; VALUE: DBG_VALUE %1(s32), $noreg, [[VAR2]], !DIExpression(), debug-location [[L2]]
/llvm-project-15.0.7/clang/test/Modules/Inputs/nested-template-default-arg-redecl/
H A Dmodule.modulemap9 module VAR2 {
/llvm-project-15.0.7/llvm/test/Transforms/Inline/
H A Dno-inline-line-tables.ll57 ; CHECK: %{{[0-9]+}} = load i32, i32* %x.addr.i1, align 4, !dbg ![[VAR2:[0-9]+]]
63 ; CHECK: ![[VAR2]] = !DILocation(line: 11, scope: ![[SCOPE]])
/llvm-project-15.0.7/utils/bazel/llvm-project-overlay/llvm/
H A Dtemplate_rule.bzl17 # "$VAR2": "bar",
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/
H A Dprolog-epilog-indirection.mir13 # CHECK: ![[VAR2:[0-9]+]] = !DILocalVariable(name: "asdf"
18 # CHECK-NEXT: DBG_VALUE $rsp, $noreg, ![[VAR2]], !DIExpression(DW_OP_plus_uconst, {{[0-9]+}}, DW_OP…
/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/Transforms/
H A Dabi-load-store.mlir20 …// CHECK-DAG: spv.GlobalVariable [[VAR2:@.*]] bind(0, 2) : !spv.ptr<!spv.struct<(!spv.array<12 x !…
58 // CHECK: [[ADDRESSARG2:%.*]] = spv.mlir.addressof [[VAR2]]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsink_sideeffecting_instruction.ll52 ; CHECK-NEXT: [[VAR2:%.*]] = bitcast i32* [[VAR]] to i8*
53 ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull [[VAR2]])
75 ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull [[VAR2]])
/llvm-project-15.0.7/llvm/test/Transforms/Attributor/
H A Dmisc_crash.ll10 ; CHECK: @[[VAR2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 0
/llvm-project-15.0.7/clang/test/OpenMP/
H A Dtarget_map_codegen_18.inc1324 // CK19-USE-DAG: store i[[Z]] [[VAR2:%.+]], i[[Z]]* [[CBP2]]
1326 // CK19-64-USE-DAG: [[VAR2]] = zext i32 %{{[^,]+}} to i64
1385 // CK19-USE-DAG: store i[[Z]] [[VAR2:%.+]], i[[Z]]* [[CBP2]]
1596 // CK19-USE-DAG: store [13 x double]* [[VAR2:%.+]], [13 x double]** [[CBP2]]
1597 // CK19-USE-DAG: store [13 x double]* [[VAR2]], [13 x double]** [[CP2]]
1651 // CK19-USE-DAG: store [13 x double]* [[VAR2:%.+]], [13 x double]** [[CBP2]]
1654 // CK19-USE-DAG: [[SEC2]] = getelementptr {{.+}}[13 x double]* [[VAR2]], i[[Z]] [[SEC22:%[^,]+]]
1710 // CK19-USE-DAG: store [13 x double]* [[VAR2:%.+]], [13 x double]** [[CBP2]]
1713 // CK19-USE-DAG: [[SEC2]] = getelementptr {{.+}}[13 x double]* [[VAR2]], i[[Z]] [[SEC22:%[^,]+]]
1769 // CK19-USE-DAG: store [13 x double]* [[VAR2:%.+]], [13 x double]** [[CBP2]]
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dlower-em-sjlj.ll174 ; CHECK: %[[VAR1:.*]] = phi i32 [ %[[VAR2:.*]], %if.end3 ], [ %[[VAR0]], %if.then ]
184 ; CHECK: %[[VAR2]] = phi i32 [ %[[VAR1]], %if.then.split ], [ undef, %entry.split ]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dsve-widen-phi.ll287 ; CHECK-NEXT: [[VAR0:%.*]] = phi i32 [ [[VAR2:%.*]], [[FOR_BODY]] ], [ [[BC_MERGE_RDX]], [[SCALA…
289 ; CHECK-NEXT: [[VAR2]] = add i32 [[VAR1]], [[VAR0]]
297 ; CHECK-NEXT: [[VAR5:%.*]] = phi i32 [ [[VAR2]], [[FOR_BODY]] ], [ [[TMP14]], [[MIDDLE_BLOCK]] ]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dstacksave-dependence.ll303 ; CHECK-NEXT: [[VAR2:%.*]] = alloca i8, align 1
306 ; CHECK-NEXT: [[VAR15:%.*]] = call i8* @wibble(i8* [[VAR2]])
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/AMDGPU/
H A Damdgcn-demanded-vector-elts-inseltpoison.ll394 ; CHECK-NEXT: ret i32 [[VAR2]]
407 ; CHECK-NEXT: ret i16 [[VAR2]]
646 ; CHECK-NEXT: ret i32 [[VAR2]]
658 ; CHECK-NEXT: ret float [[VAR2]]
1040 ; CHECK-NEXT: ret i32 [[VAR2]]
1440 ; CHECK-NEXT: ret i32 [[VAR2]]
1699 ; CHECK-NEXT: ret i32 [[VAR2]]
2100 ; CHECK-NEXT: ret i32 [[VAR2]]
2342 ; CHECK-NEXT: ret i32 [[VAR2]]
2631 ; CHECK-NEXT: ret i32 [[VAR2]]
[all …]
H A Damdgcn-demanded-vector-elts.ll394 ; CHECK-NEXT: ret i32 [[VAR2]]
407 ; CHECK-NEXT: ret i16 [[VAR2]]
646 ; CHECK-NEXT: ret i32 [[VAR2]]
658 ; CHECK-NEXT: ret float [[VAR2]]
1040 ; CHECK-NEXT: ret i32 [[VAR2]]
1440 ; CHECK-NEXT: ret i32 [[VAR2]]
1699 ; CHECK-NEXT: ret i32 [[VAR2]]
2100 ; CHECK-NEXT: ret i32 [[VAR2]]
2342 ; CHECK-NEXT: ret i32 [[VAR2]]
2631 ; CHECK-NEXT: ret i32 [[VAR2]]
[all …]

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