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Searched refs:V64Reg (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1692 SDValue operator()(SDValue V64Reg) { in operator ()() argument
1693 EVT VT = V64Reg.getValueType(); in operator ()()
1697 SDLoc DL(V64Reg); in operator ()()
1701 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
H A DAArch64ISelLowering.cpp9322 static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { in WidenVector() argument
9323 EVT VT = V64Reg.getValueType(); in WidenVector()
9327 SDLoc DL(V64Reg); in WidenVector()
9330 V64Reg, DAG.getConstant(0, DL, MVT::i64)); in WidenVector()