Home
last modified time | relevance | path

Searched refs:Trap (Results 1 – 25 of 67) sorted by relevance

123

/llvm-project-15.0.7/lldb/unittests/Host/
H A DNativeProcessProtocolTest.cpp24 auto Trap = cantFail(Process.GetSoftwareBreakpointTrapOpcode(1)); in TEST() local
28 EXPECT_CALL(Process, WriteMemory(0x47, Trap)).WillOnce(Return(ByMove(1))); in TEST()
29 EXPECT_CALL(Process, ReadMemory(0x47, 1)).WillOnce(Return(ByMove(Trap))); in TEST()
49 auto Trap = cantFail(Process.GetSoftwareBreakpointTrapOpcode(1)); in TEST() local
53 EXPECT_CALL(Process, WriteMemory(0x47, Trap)) in TEST()
64 auto Trap = cantFail(Process.GetSoftwareBreakpointTrapOpcode(1)); in TEST() local
68 EXPECT_CALL(Process, WriteMemory(0x47, Trap)).WillOnce(Return(ByMove(1))); in TEST()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVSystemOperands.td74 // User Trap Setup
81 // User Trap Handling
120 // Supervisor Trap Setup
139 // Supervisor Trap Handling
167 // Hypervisor Trap Setup
178 // Hypervisor Trap Handling
243 // Machine Trap Setup
256 // Machine Trap Handling
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AMDGPU/
H A Dtrap_gfx9.txt4 # Trap Handler related - 32 bit registers
77 # Trap Handler related - Pairs of registers
96 # Trap Handler related - Some specific instructions and quadruples of registers
112 # Trap Handler related - 8-dword registers
134 # Trap Handler related - 16-dword registers
H A Dtrap_vi.txt4 # Trap Handler related - 32 bit registers
74 # Trap Handler related - Pairs and quadruples of registers
99 # Trap Handler related - Some specific instructions
112 # Trap Handler related - 8-dword registers
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dtrap-unreachable.ll3 ; Trap is implemented via a misaligned load.
/llvm-project-15.0.7/compiler-rt/lib/stats/
H A Dstats_client.cpp82 Trap(); in __sanitizer_stat_report()
/llvm-project-15.0.7/llvm/test/MC/RISCV/
H A Drv32-supervisor-csr-names.s8 # Supervisor Trap Setup
H A Dsupervisor-csr-names.s14 # Supervisor Trap Setup
134 # Supervisor Trap Handling
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h186 Trap, enumerator
279 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap()
/llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_termination.cpp83 Trap(); in CheckFailed()
H A Dsanitizer_internal_defs.h396 inline void Trap() { in Trap() function
411 inline void Trap() { in Trap() function
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td258 // Trap handler registers
403 // Trap handler TMP 32-bit registers
410 // Trap handler TMP 16-bit registers
418 // Trap handler TMP 64-bit registers
421 // Trap handler TMP 96-bit registers
424 // Trap handler TMP 128-bit registers
427 // Trap handler TMP 160-bit registers
430 // Trap handler TMP 192-bit registers
433 // Trap handler TMP 224-bit registers
436 // Trap handler TMP 256-bit registers
[all …]
/llvm-project-15.0.7/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/
H A Da.out.crash45 Trap Number: 14
/llvm-project-15.0.7/llvm/docs/AMDGPU/
H A Dgfx8_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx7_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx90a_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx9_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx10_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx1030_hwreg.rst49 HW_REG_TRAPSTS Trap status.
H A Dgfx940_hwreg.rst49 HW_REG_TRAPSTS Trap status.
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaTemplateDeduction.cpp2816 Sema::SFINAETrap Trap(S); in FinishTemplateArgumentDeduction() local
2881 if (Trap.hasErrorOccurred()) in FinishTemplateArgumentDeduction()
2901 Sema::SFINAETrap Trap(S); in FinishTemplateArgumentDeduction() local
2926 if (Trap.hasErrorOccurred()) in FinishTemplateArgumentDeduction()
2955 SFINAETrap Trap(*this); in DeduceTemplateArguments() local
3007 SFINAETrap Trap(*this); in DeduceTemplateArguments() local
3108 SFINAETrap Trap(*this); in SubstituteExplicitTemplateArguments() local
3439 SFINAETrap Trap(*this); in FinishTemplateArgumentDeduction() local
4210 SFINAETrap Trap(*this); in DeduceTemplateArguments() local
4358 SFINAETrap Trap(*this); in DeduceTemplateArguments() local
[all …]
H A DSemaConcept.cpp221 Sema::SFINAETrap Trap(S); in calculateConstraintSatisfaction() local
231 if (SubstitutedExpression.isInvalid() || Trap.hasErrorOccurred()) { in calculateConstraintSatisfaction()
235 if (!Trap.hasErrorOccurred()) in calculateConstraintSatisfaction()
1035 SFINAETrap Trap(*this); in MaybeEmitAmbiguousAtomicConstraintsDiagnostic() local
H A DSemaTemplateInstantiate.cpp1928 Sema::SFINAETrap Trap(SemaRef); in TransformTypeRequirement() local
1936 if (!TransType || Trap.hasErrorOccurred()) in TransformTypeRequirement()
1949 Sema::SFINAETrap Trap(SemaRef); in TransformExprRequirement() local
1963 if (!TransExprRes.isInvalid() && !Trap.hasErrorOccurred() && in TransformExprRequirement()
1966 if (TransExprRes.isInvalid() || Trap.hasErrorOccurred()) in TransformExprRequirement()
2032 Sema::SFINAETrap Trap(SemaRef); in TransformNestedRequirement() local
2043 assert((CheckSucceeded || Trap.hasErrorOccurred()) && in TransformNestedRequirement()
2050 !Trap.hasErrorOccurred()) { in TransformNestedRequirement()
2054 assert((!CheckFailed || Trap.hasErrorOccurred()) && in TransformNestedRequirement()
2058 if (TransConstraint.isInvalid() || Trap.hasErrorOccurred()) in TransformNestedRequirement()
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Ddebuginstr-01.mir73 Trap
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp513 MachineInstr *Trap = MIRBuilder.buildInstr(Mips::TRAP); in legalizeIntrinsic() local
515 return constrainSelectedInstRegOperands(*Trap, TII, TRI, RBI); in legalizeIntrinsic()

123