Searched refs:TSB (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonEarlyIfConv.cpp | 312 if (TSB == FSB) in matchFlowPattern() 313 JB = TSB; in matchFlowPattern() 317 if (TSB == FB) in matchFlowPattern() 531 if (TSB != FSB) in isProfitable() 533 if (TSB->pred_size() != 2) in isProfitable() 866 TSB = *FP.TrueB->succ_begin(); in convert() 914 if (TSB) { in convert() 917 .addMBB(TSB); in convert() 918 FP.SplitB->addSuccessor(TSB); in convert() 946 if (TSB) in convert() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 302 if (Opcode == AArch64::TSB) { in printInst() 1514 } else if (Opcode == AArch64::TSB) { in printBarrierOption() 1515 auto TSB = AArch64TSB::lookupTSBByEncoding(Val); in printBarrierOption() local 1516 Name = TSB ? TSB->Name : ""; in printBarrierOption()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 426 struct TSB : SysAlias { struct
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 3509 auto TSB = AArch64TSB::lookupTSBByName(Operand); in tryParseBarrierOperand() local 3516 } else if (Mnemonic == "tsb" && (!TSB || TSB->Encoding != AArch64TSB::csync)) { in tryParseBarrierOperand() 3519 } else if (!DB && !TSB) { in tryParseBarrierOperand() 3530 DB ? DB->Encoding : TSB->Encoding, Tok.getString(), getLoc(), in tryParseBarrierOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 208 // TSB (Trace synchronization barrier) instruction options. 211 class TSB<string name, bits<4> encoding> : SearchableTable{ 222 def : TSB<"csync", 0>;
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| H A D | AArch64InstrInfo.td | 953 def TSB : CRmSystemI<barrier_op, 0b010, "tsb", []> {
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 285 case ARM::TSB: in printInst()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2193 if (Inst.getOpcode() != ARM::TSB && Inst.getOpcode() != ARM::t2TSB) in DecodeTSBInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.td | 5129 def TSB : AInoP<(outs), (ins tsb_opt:$opt), MiscFrm, NoItinerary,
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