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Searched refs:T64 (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dtype-traits.cpp2841 #define T64(X) T16(X),T16(X),T16(X),T16(X) macro
2842 #define T256(X) T64(X),T64(X),T64(X),T64(X)
2850 #undef T64
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dbad-reduction.ll409 ; CHECK-NEXT: [[T64:%.*]] = zext i8 [[T63]] to i32
419 ; CHECK-NEXT: [[T65:%.*]] = shl nuw nsw i32 [[T64]], 16
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmemory-runtime-checks.ll931 ; CHECK-NEXT: [[T64:%.*]] = xor i8 [[T63]], [[T61]]
932 ; CHECK-NEXT: store i8 [[T64]], i8* [[T62]], align 1
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dload-global-i16.ll3949 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T50.XYZW, T64.X, 0
4105 ; EG-NEXT: LSHR T64.X, PV.W, literal.x,
4133 ; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T62, T64.X
4277 ; CM-NEXT: LSHR T64.X, PV.W, literal.x,
4899 ; EG-NEXT: BFE_INT T64.Z, T48.W, 0.0, literal.x,
4903 ; EG-NEXT: BFE_INT T64.X, T48.Z, 0.0, literal.x,
4912 ; EG-NEXT: BFE_INT T64.W, T1.Y, 0.0, literal.x,
4916 ; EG-NEXT: BFE_INT T64.Y, PS, 0.0, literal.x,
4948 ; CM-NEXT: MEM_RAT_CACHELESS STORE_DWORD T64, T56.X
5125 ; CM-NEXT: BFE_INT T64.Z, T35.W, 0.0, literal.x,
[all …]
H A Dload-constant-i16.ll3411 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T62.XYZW, T64.X, 0
3566 ; EG-NEXT: LSHR T64.X, PV.W, literal.x,
4142 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T64.XYZW, T54.X, 0
4290 ; EG-NEXT: BFE_INT T64.Z, T47.W, 0.0, literal.x,
4294 ; EG-NEXT: BFE_INT T64.X, T47.Z, 0.0, literal.x,
4303 ; EG-NEXT: BFE_INT T64.W, T1.Z, 0.0, literal.x,
4307 ; EG-NEXT: BFE_INT T64.Y, PS, 0.0, literal.x,