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Searched refs:Swz (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp351 R600InstrInfo::BankSwizzle Swz) { in Swizzle() argument
354 switch (Swz) { in Swizzle()
378 static unsigned getTransSwizzle(R600InstrInfo::BankSwizzle Swz, unsigned Op) { in getTransSwizzle() argument
380 switch (Swz) { in getTransSwizzle()
407 const std::vector<R600InstrInfo::BankSwizzle> &Swz, in isLegalUpTo() argument
414 Swizzle(IGSrcs[i], Swz[i]); in isLegalUpTo()
420 if (Swz[i] != R600InstrInfo::ALU_VEC_012_SCL_210 && in isLegalUpTo()
421 Swz[i] != R600InstrInfo::ALU_VEC_021_SCL_122) { in isLegalUpTo()
H A DR600ISelLowering.h77 SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[],
H A DR600InstrInfo.h123 const std::vector<R600InstrInfo::BankSwizzle> &Swz,
H A DR600ISelLowering.cpp1626 SDValue R600TargetLowering::OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], in OptimizeSwizzle() argument
1634 unsigned Idx = cast<ConstantSDNode>(Swz[i])->getZExtValue(); in OptimizeSwizzle()
1636 Swz[i] = DAG.getConstant(SwizzleRemap[Idx], DL, MVT::i32); in OptimizeSwizzle()
1642 unsigned Idx = cast<ConstantSDNode>(Swz[i])->getZExtValue(); in OptimizeSwizzle()
1644 Swz[i] = DAG.getConstant(SwizzleRemap[Idx], DL, MVT::i32); in OptimizeSwizzle()