Searched refs:SubOp1 (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/unittests/Transforms/Utils/ |
| H A D | SSAUpdaterBulkTest.cpp | 57 Value *SubOp1 = B.CreateSub(FirstArg, ConstantInt::get(I32Ty, 2)); in TEST() local
68 auto *I3 = cast<Instruction>(B.CreateAdd(SubOp1, SubOp2)); in TEST()
69 auto *I4 = cast<Instruction>(B.CreateSub(SubOp1, SubOp2)); in TEST()
82 Updater.AddAvailableValue(VarNum, TrueBB, SubOp1); in TEST()
99 EXPECT_EQ(UpdatePhiB->getIncomingValueForBlock(TrueBB), SubOp1); in TEST()
104 EXPECT_EQ(I4->getOperand(0), SubOp1); in TEST()
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| /llvm-project-15.0.7/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 350 Value *Root, *SubOp1; in tryToRecognizePopCount() local
352 if (match(AndOp0, m_Sub(m_Value(Root), m_Value(SubOp1))) && in tryToRecognizePopCount()
353 match(SubOp1, m_And(m_LShr(m_Specific(Root), m_SpecificInt(1)), in tryToRecognizePopCount()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 17214 SDValue SubOp1 = Sub.getOperand(1); in combineTRUNCATE() local
17216 (SubOp1.getOpcode() == ISD::ZERO_EXTEND)) { in combineTRUNCATE()
17218 SubOp1.getOperand(0), in combineTRUNCATE()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 44507 SDValue SubOp1 = DAG.getNode(ISD::XOR, DL, MaskVT, V, Mask); in combineLogicBlendIntoConditionalNegate() local
44521 std::swap(SubOp1, SubOp2); in combineLogicBlendIntoConditionalNegate()
44523 SDValue Res = DAG.getNode(ISD::SUB, DL, MaskVT, SubOp1, SubOp2); in combineLogicBlendIntoConditionalNegate()
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