Home
last modified time | relevance | path

Searched refs:SrcReg1Sub0 (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp6792 MachineOperand SrcReg1Sub0 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, in splitScalar64BitAddSub() local
6806 .add(SrcReg1Sub0) in splitScalar64BitAddSub()
6862 MachineOperand SrcReg1Sub0 = buildExtractSubRegOrImm(MII, MRI, Src1, Src1RC, in splitScalar64BitBinaryOp() local
6876 .add(SrcReg1Sub0); in splitScalar64BitBinaryOp()
H A DSIISelLowering.cpp4082 MachineOperand SrcReg1Sub0 = TII->buildExtractSubRegOrImm( in EmitInstrWithCustomInserter() local
4094 .add(SrcReg1Sub0) in EmitInstrWithCustomInserter()