Searched refs:Src1SubRC (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 6788 const TargetRegisterClass *Src1SubRC = RI.getSubRegClass(Src1RC, AMDGPU::sub0); in splitScalar64BitAddSub() local
6793 AMDGPU::sub0, Src1SubRC); in splitScalar64BitAddSub()
6799 AMDGPU::sub1, Src1SubRC); in splitScalar64BitAddSub()
6858 const TargetRegisterClass *Src1SubRC = RI.getSubRegClass(Src1RC, AMDGPU::sub0); in splitScalar64BitBinaryOp() local
6863 AMDGPU::sub0, Src1SubRC); in splitScalar64BitBinaryOp()
6867 AMDGPU::sub1, Src1SubRC); in splitScalar64BitBinaryOp()
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| H A D | SIISelLowering.cpp | 4077 const TargetRegisterClass *Src1SubRC = in EmitInstrWithCustomInserter() local
4083 MI, MRI, Src1, Src1RC, AMDGPU::sub0, Src1SubRC); in EmitInstrWithCustomInserter()
4088 MI, MRI, Src1, Src1RC, AMDGPU::sub1, Src1SubRC); in EmitInstrWithCustomInserter()
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