Searched refs:SpvType (Results 1 – 3 of 3) sorted by relevance
123 if (SpvType) in getOrCreateConstIntReg()132 unsigned BitWidth = SpvType ? getScalarOrVectorBitWidth(SpvType) : 32; in getOrCreateConstIntReg()148 assert(SpvType); in getOrCreateConstInt()182 if (SpvType) in buildConstantInt()191 unsigned BitWidth = SpvType ? getScalarOrVectorBitWidth(SpvType) : 32; in buildConstantInt()202 assert(SpvType); in buildConstantInt()208 assert(SpvType); in buildConstantInt()227 if (SpvType) { in buildConstantFP()228 LLVMFPTy = getTypeForSPIRVType(SpvType); in buildConstantFP()237 unsigned BitWidth = SpvType ? getScalarOrVectorBitWidth(SpvType) : 32; in buildConstantFP()[all …]
199 uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,205 SPIRVType *SpvType = nullptr, bool EmitIR = true);207 SPIRVType *SpvType, const SPIRVInstrInfo &TII);209 SPIRVType *SpvType = nullptr);211 SPIRVType *SpvType,213 Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType,
301 SPIRVType *SpvType = GR.getSPIRVTypeForVReg(ValReg); in createNewIdReg() local302 assert(SpvType && "VReg is expected to have SPIRV type"); in createNewIdReg()303 bool IsFloat = SpvType->getOpcode() == SPIRV::OpTypeFloat; in createNewIdReg()305 SpvType->getOpcode() == SPIRV::OpTypeVector && in createNewIdReg()306 GR.getSPIRVTypeForVReg(SpvType->getOperand(1).getReg())->getOpcode() == in createNewIdReg()