Searched refs:SplitF64 (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/RISCV/ |
| H A D | double-bitmanip-dagcombines.ll | 18 ; RISCVISD::SplitF64/BuildPairF64 used for RV32IFD.
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 42 SplitF64, enumerator
|
| H A D | RISCVInstrInfoD.td | 26 def RISCVSplitF64 : SDNode<"RISCVISD::SplitF64", SDT_RISCVSplitF64>;
|
| H A D | RISCVISelLowering.cpp | 8840 case RISCVISD::SplitF64: { in PerformDAGCombine()
8873 DAG.getNode(RISCVISD::SplitF64, DL, DAG.getVTList(MVT::i32, MVT::i32), in PerformDAGCombine()
11235 SDValue SplitF64 = DAG.getNode( in LowerCall() local
11236 RISCVISD::SplitF64, DL, DAG.getVTList(MVT::i32, MVT::i32), ArgValue); in LowerCall()
11237 SDValue Lo = SplitF64.getValue(0); in LowerCall()
11238 SDValue Hi = SplitF64.getValue(1); in LowerCall()
11511 SDValue SplitF64 = DAG.getNode(RISCVISD::SplitF64, DL, in LowerReturn() local
11513 SDValue Lo = SplitF64.getValue(0); in LowerReturn()
11514 SDValue Hi = SplitF64.getValue(1); in LowerReturn()
11610 NODE_NAME_CASE(SplitF64) in getTargetNodeName()
|