Home
last modified time | relevance | path

Searched refs:SparcInstrInfo (Results 1 – 12 of 12) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp32 void SparcInstrInfo::anchor() {} in anchor()
34 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) in SparcInstrInfo() function in SparcInstrInfo
43 unsigned SparcInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
62 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
159 bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
242 unsigned SparcInstrInfo::insertBranch(MachineBasicBlock &MBB, in insertBranch()
273 unsigned SparcInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
297 bool SparcInstrInfo::reverseBranchCondition( in reverseBranchCondition()
305 void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
394 void SparcInstrInfo::
[all …]
H A DSparcFrameLowering.cpp48 const SparcInstrInfo &TII = in emitSPAdjustment()
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitSPAdjustment()
92 const SparcInstrInfo &TII = in emitPrologue()
93 *static_cast<const SparcInstrInfo *>(Subtarget.getInstrInfo()); in emitPrologue()
218 const SparcInstrInfo &TII = in emitEpilogue()
219 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo()); in emitEpilogue()
H A DSparcInstrInfo.h38 class SparcInstrInfo : public SparcGenInstrInfo {
43 explicit SparcInstrInfo(SparcSubtarget &ST);
H A DSparcSubtarget.h55 SparcInstrInfo InstrInfo;
64 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo()
H A DSparc.td75 include "SparcInstrInfo.td"
77 def SparcInstrInfo : InstrInfo;
179 let InstructionSet = SparcInstrInfo;
H A DCMakeLists.txt21 SparcInstrInfo.cpp
H A DSparcInstrAliases.td341 // Note: cmp is handled in SparcInstrInfo.
H A DSparcInstr64Bit.td12 // Some SPARC v9 instructions are defined in SparcInstrInfo.td because they can
H A DSparcInstrInfo.td1 //===-- SparcInstrInfo.td - Target Description for Sparc Target -----------===//
/llvm-project-15.0.7/llvm/test/CodeGen/Generic/
H A D2002-04-14-UnexpectedUnsignedType.ll4 ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"'
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/Sparc/
H A DBUILD.gn38 "SparcInstrInfo.cpp",
/llvm-project-15.0.7/llvm/docs/
H A DWritingAnLLVMBackend.rst203 SparcInstrInfo InstrInfo;
212 virtual const SparcInstrInfo *getInstrInfo() const {return &InstrInfo; }
750 floating-point operations. ``SparcInstrInfo.td`` also adds the base class
753 ``SparcInstrInfo.td`` largely consists of operand and instruction definitions
754 for the SPARC target. In ``SparcInstrInfo.td``, the following target
770 ``MEMrr`` that is defined earlier in ``SparcInstrInfo.td``:
826 ``SparcInstrInfo.td`` also includes definitions for condition codes that are
828 ``SparcInstrInfo.td`` indicate the bit location of the SPARC condition code.
1076 ``SparcInstrInfo.cpp``:
1261 definitions in ``XXXInstrInfo.td``. For example, in ``SparcInstrInfo.td``,
[all …]