| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-vshuffle.ll | 9 %Shuff = shufflevector <8 x i1> <i1 0, i1 1, i1 2, i1 3, i1 4, i1 5, i1 6, 15 ret <8 x i1> %Shuff 24 %Shuff = shufflevector <8 x i1> zeroinitializer, 28 ret <8 x i1> %Shuff 37 …%Shuff = shufflevector <16 x i1> <i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 0, i1 0, i1 0, i1 1, i1 1… 41 ret <16 x i1> %Shuff 65 %Shuff = shufflevector <16 x i1> zeroinitializer, 70 ret <16 x i1> %Shuff
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| H A D | arm64-2013-02-12-shufv8i8.ll | 3 ;CHECK-LABEL: Shuff: 6 define <8 x i8 > @Shuff(<8 x i8> %in, <8 x i8>* %out) nounwind ssp {
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | selectiondag-crash.ll | 8 …%Shuff = shufflevector <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>,… 9 …%Shuff14 = shufflevector <8 x i32> %Shuff, <8 x i32> %Shuff, <8 x i32> <i32 7, i32 9, i32 11, i32 … 10 …%Shuff35 = shufflevector <8 x i32> %Shuff14, <8 x i32> %Shuff, <8 x i32> <i32 undef, i32 1, i32 3,…
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| H A D | fold-vector-sext-crash2.ll | 41 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3> 42 ret <2 x i256> %Shuff 79 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3> 80 ret <2 x i256> %Shuff 116 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3> 117 ret <2 x i256> %Shuff 153 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3> 154 ret <2 x i256> %Shuff
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| H A D | vbinop-simplify-bug.ll | 19 …%Shuff = shufflevector <8 x i32> zeroinitializer, <8 x i32> zeroinitializer, <8 x i32> <i32 1, i32… 20 %B23 = sub <8 x i32> %Shuff, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
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| H A D | liveness-local-regalloc.ll | 77 …%Shuff = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 5, i32…
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| H A D | crash.ll | 324 …%Shuff = shufflevector <8 x double> undef, <8 x double> undef, <8 x i32> <i32 0, i32 2, i32 4, i32… 328 %B16 = frem <8 x double> zeroinitializer, %Shuff 329 %E19 = extractelement <8 x double> %Shuff, i32 5
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| H A D | fold-vector-shuffle-crash.ll | 28 …%Shuff = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 7, i32… 217 %I144 = insertelement <4 x i64> %Shuff, i64 %4, i32 3
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | set0-v8i16.ll | 6 …%Shuff = shufflevector <16 x i16> zeroinitializer, <16 x i16> zeroinitializer, <16 x i32> <i32 26,… 7 …%Shuff7 = shufflevector <16 x i16> zeroinitializer, <16 x i16> %Shuff, <16 x i32> <i32 20, i32 und… 16 %Sl37 = select i1 %E27, <16 x i16> undef, <16 x i16> %Shuff
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| H A D | std-unal-fi.ll | 8 …%Shuff = shufflevector <16 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1,… 14 … -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <16 x i32> %Shuff, <16 x i32> <i32 2…
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| /llvm-project-15.0.7/llvm/test/CodeGen/Mips/msa/ |
| H A D | llvm-stress-s1704963983.ll | 20 …%Shuff = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 5, i32… 30 …%Shuff7 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 13, i32 15, i3… 35 %Cmp10 = icmp uge <8 x i64> %Shuff, zeroinitializer 39 …%Shuff13 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 9, i32 11, i3… 42 %Tr = trunc <8 x i64> %Shuff to <8 x i32> 63 …%Shuff28 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 13, i32 15, i… 95 %Sl53 = select i1 %Cmp, <8 x i64> %Shuff, <8 x i64> %Shuff
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| H A D | llvm-stress-s2704903805.ll | 19 %Shuff = shufflevector <1 x i8> <i8 -1>, <1 x i8> <i8 -1>, <1 x i32> undef 58 %Shuff22 = shufflevector <1 x i8> <i8 -1>, <1 x i8> %Shuff, <1 x i32> zeroinitializer 74 %Shuff35 = shufflevector <1 x i8> %Shuff, <1 x i8> <i8 -1>, <1 x i32> zeroinitializer 89 %Sl45 = select i1 true, <1 x i8> %Shuff, <1 x i8> %I43 90 %Cmp46 = icmp sge <1 x i8> %I36, %Shuff 121 %Sl67 = select i1 %Tr, <1 x i8> %Shuff, <1 x i8> %I23
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| H A D | llvm-stress-s1935737938.ll | 20 …%Shuff = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> <i32 1, i32… 49 %I21 = insertelement <2 x i32> %Shuff, i32 135673, i32 0 55 %E26 = extractelement <2 x i32> %Shuff, i32 1 98 %Shuff55 = shufflevector <2 x i32> %Shuff, <2 x i32> zeroinitializer, <2 x i32> <i32 0, i32 2> 125 %I71 = insertelement <2 x i32> %Shuff, i32 %E26, i32 0
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| H A D | llvm-stress-s997348632.ll | 20 …%Shuff = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 undef,… 23 %Sl = select i1 false, <4 x i64> %Shuff, <4 x i64> %Shuff 113 %E63 = extractelement <4 x i64> %Shuff, i32 2 131 %E71 = extractelement <4 x i64> %Shuff, i32 0
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| H A D | llvm-stress-s3926023935.ll | 20 …%Shuff = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x… 57 …%Shuff27 = shufflevector <4 x i32> %Shuff, <4 x i32> %I14, <4 x i32> <i32 6, i32 0, i32 undef, i32… 82 %I43 = insertelement <4 x i32> %Shuff, i32 %3, i32 0 121 %I65 = insertelement <4 x i32> %Shuff, i32 %3, i32 3
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| H A D | llvm-stress-s3861334421.ll | 20 …%Shuff = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 3, i32… 73 %E35 = extractelement <8 x i64> %Shuff, i32 7 107 …%Shuff58 = shufflevector <8 x i64> %Shuff, <8 x i64> zeroinitializer, <8 x i32> <i32 4, i32 6, i32… 127 %Cmp71 = icmp slt <8 x i64> %I, %Shuff
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| H A D | llvm-stress-s3997499501.ll | 20 …%Shuff = shufflevector <2 x i1> zeroinitializer, <2 x i1> zeroinitializer, <2 x i32> <i32 1, i32 3> 29 %I8 = insertelement <2 x i1> %Shuff, i1 false, i32 0 65 %E25 = extractelement <2 x i1> %Shuff, i32 1 131 %Cmp64 = icmp ne <2 x i1> %Cmp, %Shuff
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| H A D | llvm-stress-s525530439.ll | 20 …%Shuff = shufflevector <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 -1, i32 -1>, <2 x i32> <i32 2, i…
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | DAGCombine_trunc_extract.ll | 14 %Shuff = shufflevector <2 x i8> undef, <2 x i8> %Arg, <2 x i32> <i32 3, i32 1> 15 %E = extractelement <2 x i8> %Shuff, i32 0
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| H A D | splitMove_undefReg_mverifier_2.ll | 16 …%Shuff = shufflevector <8 x i8> zeroinitializer, <8 x i8> zeroinitializer, <8 x i32> <i32 undef, i… 31 %B27 = mul <8 x i8> zeroinitializer, %Shuff
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| H A D | splitMove_undefReg_mverifier.ll | 20 …%Shuff = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 undef,… 116 %B54 = or <2 x i16> %Shuff, zeroinitializer
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3539 SDValue Shuff = in LowerSETCC() local 3543 dl, MVT::v4i32, Shuff, SetCC32)); in LowerSETCC()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 16388 SDValue Shuff = DAG.getVectorShuffle( in PerformTruncatingStoreCombine() local 16408 SDValue ShuffWide = DAG.getNode(ISD::BITCAST, DL, StoreVecVT, Shuff); in PerformTruncatingStoreCombine()
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