| /llvm-project-15.0.7/flang/lib/Optimizer/Dialect/ |
| H A D | FIRType.cpp | 68 ty.isa<ShiftType>() || ty.isa<SliceType>() || ty.isa<FieldType>() || in verifyRecordMemberType()
819 ShiftType, SliceType, FieldType, LenType, HeapType, PointerType, in verify()
854 mlir::Type fir::ShiftType::parse(mlir::AsmParser &parser) { in parse()
855 return parseRankSingleton<fir::ShiftType>(parser); in parse()
858 void fir::ShiftType::print(mlir::AsmPrinter &printer) const { in print()
892 ShiftType, SliceType, FieldType, LenType, ReferenceType, in verify()
976 SequenceType, ShapeType, ShapeShiftType, ShiftType, SliceType, in registerTypes()
|
| H A D | FIROps.cpp | 380 auto s = shapeTy.cast<fir::ShiftType>(); in verify()
449 auto s = shapeTy.cast<fir::ShiftType>(); in verify()
2233 if (auto shiftTy = shapeVal.getType().dyn_cast<fir::ShiftType>()) { in verify()
2258 auto shiftTy = ty.cast<fir::ShiftType>(); in verify()
3065 auto shiftTy = getType().dyn_cast<fir::ShiftType>(); in verify()
|
| /llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM64/ |
| H A D | EmulateInstructionARM64.h | 111 enum ShiftType { ShiftType_LSL, ShiftType_LSR, ShiftType_ASR, ShiftType_ROR }; enum
|
| /llvm-project-15.0.7/flang/include/flang/Optimizer/Dialect/ |
| H A D | FIRType.h | 169 if (auto shTy = t.dyn_cast<fir::ShiftType>()) in getRankOfShapeType()
|
| H A D | FIRTypes.td | 403 dimension. The rank of a ShiftType must be at least 1.
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 212 unsigned RHSReg, AArch64_AM::ShiftExtendType ShiftType,
244 AArch64_AM::ShiftExtendType ShiftType, uint64_t ShiftImm,
1252 case Instruction::Shl: ShiftType = AArch64_AM::LSL; break; in emitAddSub()
1253 case Instruction::LShr: ShiftType = AArch64_AM::LSR; break; in emitAddSub()
1254 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
1257 if (ShiftType != AArch64_AM::InvalidShiftExtend) { in emitAddSub()
1261 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, RHSReg, ShiftType, in emitAddSub()
1364 AArch64_AM::ShiftExtendType ShiftType, in emitAddSub_rs() argument
1400 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
1557 AArch64_AM::ShiftExtendType ShiftType, in emitSubs_rs() argument
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 458 bool parseMemRegOffsetShift(ARM_AM::ShiftOpc &ShiftType,
862 ARM_AM::ShiftOpc ShiftType; // Shift type for OffsetReg member
1625 if (Memory.ShiftType != ARM_AM::no_shift) return false; in isAddrMode3()
1718 if (Memory.ShiftType == ARM_AM::no_shift) in isT2MemRegOffset()
1720 if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3) in isT2MemRegOffset()
1895 if (shift == 0 && Memory.ShiftType != ARM_AM::no_shift) in isMemRegRQOffset()
3218 Memory.ShiftImm, Memory.ShiftType); in addMemRegOffsetOperands()
3819 Op->Memory.ShiftType = ShiftType; in CreateMem()
3962 if (Memory.ShiftType != ARM_AM::no_shift) { in print()
6004 ARM_AM::ShiftOpc ShiftType = ARM_AM::no_shift; in parseMemory() local
[all …]
|
| /llvm-project-15.0.7/flang/lib/Optimizer/Builder/ |
| H A D | MutableBox.cpp | 512 fir::ShiftType::get(builder.getContext(), newLbounds.size()); in associateMutableBox()
|
| H A D | FIRBuilder.cpp | 393 fir::ShiftType::get(getContext(), box.getLBounds().size()); in createShape()
|
| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 2064 Type *ShiftType = Shl->getType(); in foldICmpShlOne() local
2090 return new ICmpInst(Pred, Y, ConstantInt::get(ShiftType, CLog2)); in foldICmpShlOne()
2092 Constant *BitWidthMinusOne = ConstantInt::get(ShiftType, TypeBits - 1); in foldICmpShlOne()
2113 return new ICmpInst(Pred, Y, ConstantInt::get(ShiftType, C.logBase2())); in foldICmpShlOne()
|
| /llvm-project-15.0.7/flang/lib/Lower/ |
| H A D | ConvertExpr.cpp | 4234 auto shiftTy = fir::ShiftType::get(eleTy.getContext(), lbs.size()); in convertElementForUpdate()
|