Searched refs:ShiftL (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/include/llvm/Support/ |
| H A D | ScaledNumber.h | 307 int32_t ShiftL = std::min<int32_t>(countLeadingZeros(LDigits), ScaleDiff); in matchScales() local
308 assert(ShiftL < getWidth<DigitsT>() && "can't shift more than width"); in matchScales()
310 int32_t ShiftR = ScaleDiff - ShiftL; in matchScales()
317 LDigits <<= ShiftL; in matchScales()
320 LScale -= ShiftL; in matchScales()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3554 SDValue ShiftL = in get64BitZExtCompare() local
3565 ShiftR, ShiftL, SubtractCarry), 0); in get64BitZExtCompare()
3716 SDValue ShiftL = in get64BitSExtCompare() local
3725 ShiftR, ShiftL, SubtractCarry), 0); in get64BitSExtCompare()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1947 auto ShiftL = MIRBuilder.buildShl(WideTy, LHS, ShiftK); in widenScalarAddSubShlSat() local
1951 {ShiftL, ShiftR}, MI.getFlags()); in widenScalarAddSubShlSat()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 21914 SDValue ShiftL = Op; in SimplifyDemandedBitsForTargetNode() local
21919 if (!ShiftL.hasOneUse() || !ShiftR.hasOneUse()) in SimplifyDemandedBitsForTargetNode()
21922 unsigned ShiftLBits = ShiftL->getConstantOperandVal(1); in SimplifyDemandedBitsForTargetNode()
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